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2007-01-05nouveau: oops, we don't need OS_HAS_MTRR actually.Stephane Marchesin
2007-01-05Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drmStephane Marchesin
2007-01-05nouveau: Add an mtrr over the whole FBStephane Marchesin
2007-01-05Merge branch 'master' of git+ssh://matc@git.freedesktop.org/git/mesa/drm/Matthieu Castet
2007-01-05Add basic pgraph context for nv10.Matthieu Castet
It only fake a context switch : pgraph state are not save/restored.
2007-01-05Cleanup the nv04 fifo code a bit.Stephane Marchesin
2007-01-02i915: Fix a DRM_ERROR that should be DRM_DEBUG.Michel Dänzer
It would clutter up the kernel output in a situation which is legitimate before X.org 7.2 and handled correctly by the 3D driver.
2007-01-02nouveau: oops, forgot to free RAMIN..Ben Skeggs
2007-01-02nouveau: Hookup nv40_graph_init.Ben Skeggs
Now I can get 3D + working grctx switching on my NV40 without the binary driver initialising the card first. However, this change also breaks 3D on my C51 even *with* the binary driver's help. So, it's likely that the weird voodoo is card-specific.
2007-01-02nouveau: Hook up grctx code for NV4x.Ben Skeggs
This is enough to get grctx switching going on my NV40 and C51 after the binary driver has initialised the card first. Bumping the drm patchlevel because the ddx needs some modifications to have NV4x work at all with these changes.
2007-01-02nouveau: Add nv40-specific PGRAPH code, not hooked up yet.Ben Skeggs
2007-01-02nouveau: Only clobber PFIFO if no channels are already alloc'dBen Skeggs
With this change the GPU is responsible for doing the channel switch itself. This is needed for the upcoming NV4x PGRAPH context work as we don't yet know enough to manually swap PGRAPH contexts.
2006-12-28Add some new via chipsets.Thomas Hellstrom
Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine.
2006-12-27Leftover from previous commit.Thomas Hellstrom
2006-12-27Allow for non-power-of-two texture pitch alignment.Thomas Hellstrom
2006-12-27nouveau: return the *actual* type of memory alloc'd to userspaceBen Skeggs
2006-12-26nouveau: Alloc cmdbuf for each channel individuallyBen Skeggs
2006-12-21nouveau: save/restore endianness flag on FIFO switchBen Skeggs
This makes my G5 survive glxinfo and nouveau_demo - airlied
2006-12-20Some via PCI posting flushes.Thomas Hellstrom
2006-12-20Merge branch 'nouveau-1'Dave Airlie
2006-12-19fixup i915 return values from kernelDave Airlie
2006-12-19fix comment in r128Dave Airlie
2006-12-19fix some sizes in sis_drv.hDave Airlie
2006-12-19remove inline from large functionDave Airlie
2006-12-19make a savage function static from kernelDave Airlie
2006-12-19fix missing DRM_ERR from kernelDave Airlie
2006-12-14Unify radeon offset checking.Michel Dänzer
Replace r300_check_offset() with generic radeon_check_offset(), which doesn't reject valid offsets when the framebuffer area is at the very end of the card's 32 bit address space. Make radeon_check_and_fixup_offset() use radeon_check_offset() as well. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=7697 .
2006-12-12Port remaining NV4 RAMIN access from the ddx into the drm.Ben Skeggs
Should fix lockups seen on NV4 cards.
2006-12-03Merge the pciid work.Stephane Marchesin
Add getparams for AGP and FB physical adresses. Fix the MEM_ALLOC issue properly. Fix context switches for nv44. Change the DRM version to 0.0.1.
2006-12-01Unshare drm_drawable.c again for now.Michel Dänzer
The current version didn't build on BSD, where the new functionality isn't used yet anyway. Whoever changes that will hopefully be able to make the OSes share this file as well.
2006-11-30Use nouveau_mem.c to allocate RAMIN.Ben Skeggs
2006-11-30Wrap access to objects in RAMIN.Ben Skeggs
This will make it easier to support extra RAMIN in vram at a later point.
2006-11-28For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context.Matthieu Castet
When cleaning a fifo, we shouldn't assume everybody use nv40 ;) Fill DMA_SUBROUTINE fill correct value.
2006-11-27i915_vblank_tasklet: Try harder to avoid tearing.Michel Dänzer
Previously, if there were several buffer swaps scheduled for the same vertical blank, all but the first blit emitted stood a chance of exhibiting tearing. In order to avoid this, split the blits along slices of each output top to bottom.
2006-11-21Merge branch 'nouveau-1' of ↵Stephane Marchesin
git+ssh://marcheu@git.freedesktop.org/git/mesa/drm into nouveau-1
2006-11-21Don't spam dmesg if PMC_INTSTAT is 0Ben Skeggs
2006-11-18Only return FIFO number if the FIFO is marked as in use..Ben Skeggs
2006-11-18Check some return vals, fixes a couple of oopses.Ben Skeggs
2006-11-17Dump some useful info when a PGRAPH error occurs.Ben Skeggs
The "channel" detect doesn't work on my nv40, but the rest seems to produce sane info.
2006-11-16Merge branch 'nouveau-1' of ↵Stephane Marchesin
git+ssh://marcheu@git.freedesktop.org/git/mesa/drm into nouveau-1
2006-11-14Completely untested NV10/20/30 FIFO context switching changes.Ben Skeggs
2006-11-14Restructure initialisation a bit.Ben Skeggs
- Do important card init in firstopen - Give each channel it's own cmdbuf dma object - Move RAMHT config state to the same place as RAMRO/RAMFC - Make sure instance mem for objects is *after* RAM{FC,HT,RO}
2006-11-14Merge branch 'nouveau-1' of git+ssh://git.freedesktop.org/git/mesa/drm into ↵Ben Skeggs
nouveau-1
2006-11-14Hack around yet another "X restart borkage without nouveau.ko reload" problem.Ben Skeggs
On X init, PFIFO and PGRAPH are reset to defaults. This causes the GPU to loose the configuration done by the drm. Perhaps a CARD_INIT ioctl a proper solution to having this problem again in the future..
2006-11-11Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drm ↵Stephane Marchesin
into nouveau-1
2006-11-10Fix memory detection on TNT2 M64/TNT2 vanta.Stephane Marchesin
2006-11-07Add drm_u64_t typedef on non-linux to fix libdrm build.Eric Anholt
2006-11-06drm: fixup page alignment on SAREA map on ppc64Dave Airlie
2006-11-06fixup fifo size so it is page alignedDave Airlie
2006-11-06use a uint64_t for this not a pointerDave Airlie
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