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AgeCommit message (Expand)Author
2007-03-10i915: Only wait for pending flips before asynchronous flips again.Michel Dänzer
2007-03-09i915: Do not wait for pending flips on both pipes at the same time.Michel Dänzer
2007-03-07nouveau: remove a hack that's not needed since the last interface change.Ben Skeggs
2007-03-07nouveau: ack PFIFO interrupts at PFIFO, not PMC.Ben Skeggs
2007-02-28i915: Eliminate dev_priv->current_page.Michel Dänzer
2007-02-28i915: Only clean up page flipping when the last client goes away, not any one.Michel Dänzer
2007-02-28i915: Don't emit waits for pending flips before emitting synchronous flips.Michel Dänzer
2007-02-28i915: Fix test for synchronous flip affecting both pipes.Michel Dänzer
2007-02-22i915: Add support for scheduled buffer swaps to be done as flips.Michel Dänzer
2007-02-22Add DRM_VBLANK_FLIP.Michel Dänzer
2007-02-19i915: Improved page flipping support, including triple buffering.Michel Dänzer
2007-02-19i915: Page flipping enhancements.Michel Dänzer
2007-02-19i915: Unify breadcrumb emission.Michel Dänzer
2007-02-09I915 accelerated blit copy functional.Thomas Hellstrom
2007-02-07Warning fix: correct type of i915_mmio argument.Eric Anholt
2007-02-07Define __iomem for systems without it.Eric Anholt
2007-02-07Add chip family flags to i915 driver, and fix a missing '"' in mach64 ID list.Eric Anholt
2007-02-07Checkpoint commit.Thomas Hellstrom
2007-02-06Implement a policy for selecting memory types.Thomas Hellstrom
2007-02-06nouveau: more work on the nv04 context switch code.Stephane Marchesin
2007-02-03nouveau: and of course, I was missing the last nv04 piece.Stephane Marchesin
2007-02-03nouveau: plugin the nv04 graph init function.Stephane Marchesin
2007-02-03nouveau: cleanup the nv04 pgraph save/restore mechanism.Stephane Marchesin
2007-02-03nouveau: fix nv04 graph routines for new register names.Stephane Marchesin
2007-02-03nouveau: rename registers to their proper names.Stephane Marchesin
2007-02-03nouveau: add NV04 registers required for PGRAPH context switching.Stephane Marchesin
2007-02-02nouveau: nv ctx switch opps the size of array was wrongMatthieu Castet
2007-02-02nouveau: nv10 ctx switch, some regs are nv17+ onlyMatthieu Castet
2007-02-02via: Try to improve command-buffer chaining.Thomas Hellstrom
2007-02-02Disable AGP DMA for chips with the new 3D engine.Thomas Hellstrom
2007-01-31memory manager: Make device driver aware of different memory types.Thomas Hellstrom
2007-01-28nouveau: determine chipset type at startup, instead of every time we use it.Ben Skeggs
2007-01-26make works ctx switch on nv10.Matthieu Castet
2007-01-26nouveau: oops, wrong indexing in nv17 regsPatrice Mandin
2007-01-26nouveau: read gpu type oncePatrice Mandin
2007-01-26nouveau: only save/restore nv17 regs on nv17,18 hwPatrice Mandin
2007-01-26nouveau: add extra pgraph registersPatrice Mandin
2007-01-26nouveau: add some nv10 pgraph definesPatrice Mandin
2007-01-25nouveau: simplify and fix BIG_ENDIAN flagsPatrice Mandin
2007-01-25nouveau: nv4c default contextBen Skeggs
2007-01-25nouveau: always print nsource/nstatus regs on PGRAPH errorsBen Skeggs
2007-01-24vblank interrupt fixZou Nan hai
2007-01-19nouveau: fix getparam from 32-bit client on 64-bit kernelBen Skeggs
2007-01-19nouveau: re-add 6150 Go pciid (0x0244)Ben Skeggs
2007-01-18nouveau: cleanup nv30_graph.cJeremy Kolb
2007-01-18nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.Jeremy Kolb
2007-01-18add missing quadro idDave Jones
2007-01-17nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.Jeremy Kolb
2007-01-14nouveau: opps nv20 ctx ramin size was wrongMatthieu Castet
2007-01-13nouveau: opps restored the wrong channelMatthieu Castet
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-29 13:49:14 +0000
>unsigned hwTileStride; unsigned desiredTileStride; void *virtual; void *mapVirtual; int mapCount; unsigned pad[8]; /* for future expansion */ } drmBO; /* * Fence functions. */ extern int drmFenceCreate(int fd, unsigned flags, int fence_class, unsigned type, drmFence *fence); extern int drmFenceReference(int fd, unsigned handle, drmFence *fence); extern int drmFenceUnreference(int fd, const drmFence *fence); extern int drmFenceFlush(int fd, drmFence *fence, unsigned flush_type); extern int drmFenceSignaled(int fd, drmFence *fence, unsigned fenceType, int *signaled); extern int drmFenceWait(int fd, unsigned flags, drmFence *fence, unsigned flush_type); extern int drmFenceEmit(int fd, unsigned flags, drmFence *fence, unsigned emit_type); extern int drmFenceBuffers(int fd, unsigned flags, uint32_t fence_class, drmFence *fence); /* * Buffer object functions. */ extern int drmBOCreate(int fd, unsigned long size, unsigned pageAlignment, void *user_buffer, uint64_t mask, unsigned hint, drmBO *buf); extern int drmBOReference(int fd, unsigned handle, drmBO *buf); extern int drmBOUnreference(int fd, drmBO *buf); extern int drmBOMap(int fd, drmBO *buf, unsigned mapFlags, unsigned mapHint, void **address); extern int drmBOUnmap(int fd, drmBO *buf); extern int drmBOFence(int fd, drmBO *buf, unsigned flags, unsigned fenceHandle); extern int drmBOInfo(int fd, drmBO *buf); extern int drmBOBusy(int fd, drmBO *buf, int *busy); extern int drmBOWaitIdle(int fd, drmBO *buf, unsigned hint); /* * Initialization functions. */ extern int drmMMInit(int fd, unsigned long pOffset, unsigned long pSize, unsigned memType); extern int drmMMTakedown(int fd, unsigned memType); extern int drmMMLock(int fd, unsigned memType, int lockBM, int ignoreNoEvict); extern int drmMMUnlock(int fd, unsigned memType, int unlockBM); extern int drmMMInfo(int fd, unsigned memType, uint64_t *size); extern int drmBOSetStatus(int fd, drmBO *buf, uint64_t flags, uint64_t mask, unsigned int hint, unsigned int desired_tile_stride, unsigned int tile_info); extern int drmBOVersion(int fd, unsigned int *major, unsigned int *minor, unsigned int *patchlevel); #endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-29 13:49:14 +0000