Age | Commit message (Collapse) | Author |
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New PCI command parser. Moved from via_dma.c to via_verifier.c so functions
with similar functionality are close to eachother.
Moved video related functions to via_video.c, which might be extended in
the future, as new video functionality is added.
New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL,
but with support for multiple device IRQ sources and functionality.
Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and
PCI parser.
Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ
IOCTL.
Bumped minor. New version 2.6.0.
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1. Initialize futex locks to zero on device init.
2. Remove some stray defines from via_drm.h
3. Prepare via_drm.h for drm client inclusion. The goal is to share a
common file with common definitions.
4. Sync shared / shared-core via_drm.h
5. Bump minor, because of the futex lock initialization.
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driver. It can now handle the 3D OpenGL commands from the Mesa
unichrome driver.
Added vsync frequency detection support. This will be used in the future
for XvMC and better frame timing.
Bumped minor version number and driver date.
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rudimentary command verifier for dma buffers. Changed the decoder futex
ioctl parameters. Bumped the via major version number.
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weren't Lindent's because their comments didn't convert very well. A
bunch of other minor clean up with no code implact included.
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DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH
The first ioctl sets up an area in AGP memory that will be used as the ring
buffer. The second ioctl copies a command buffer from user space memory
to the ring buffer. The third ioctl waits for engine idle until it
returns.
The motivation for this patch is to avoid the wait for engine idle call
before each buffer flush in the current DRI driver. With this patch,
the DRI driver can continue to flush its buffer as long as there is
free space in the ring buffer.
This patch adds an additional copy operation on the command buffer. This
buffer copying is necessary to support multiple DRI clients rendering
simultaneously. Otherwise, more CPU time will be spent in the busy loop
waiting for engine idle between DRI context switch. Even in the single
client case, the tradeoff is reasonable in comparision to the kernel
call to check for free buffer space for the client to render directly
to the ring buffer.
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