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path: root/shared-core/radeon_drm.h
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2005-09-30fix pci overriding from userspaceDave Airlie
2005-09-11Add GART in FB support for ati pcigart, and PCIE support for r300Dave Airlie
2005-09-09Add support for GL_ATI_fragment_shader, new packets R200_EMIT_PP_AFS_0/1,Roland Scheidegger
R200_EMIT_PP_TXCTLALL_0-5 (replaces R200_EMIT_PP_TXFILTER_0-5, 2 more regs) and R200_EMIT_ATF_TFACTOR (replaces R200_EMIT_TFACTOR_0 (8 consts instead of 6)
2005-08-04Mark some radeon init variables deprecated. These used to be passed in butJon Smirl
the driver already knew their correct value. For example the physical address of the framebuffer and registers.
2005-07-20Add latest r300 support from r300.sf.net CVS. Patch submitted by volodya,Eric Anholt
with BSD fix from jkim and the r300_reg.h license from Nicolai Haehnle. Big thanks to everyone involved!
2005-03-15add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear filtering onRoland Scheidegger
r200
2005-02-10add support for texture micro tiling on radeon/r200. Add support for r100Roland Scheidegger
cube maps (since it also requires a version bump) at the same time.
2005-01-26(Stephane Marchesin,me) Add radeon framebuffer tiling support to radeonRoland Scheidegger
drm. Add new ioctls to manage surfaces which cover the tiled areas
2004-12-08(Stephane Marchesin, me) add hyperz support to radeon drm. Only fast zRoland Scheidegger
clear and z buffer compression are working correctly, hierarchical-z is not.
2004-10-10Vladimir requested support so we can at least load r300 microcode forDave Airlie
helping 2D operations. Ups radeon to version 1.12.0, Vladimir, you might want to add any extra pciids... Approved-by: Dave Airlie <airlied@linux.ie>
2004-09-30Lindent of core build. Drivers checked for no binary diffs. A few filesJon Smirl
weren't Lindent's because their comments didn't convert very well. A bunch of other minor clean up with no code implact included.
2004-08-17preparation patch for radeon permanent mapping registers/framebuffer makesDave Airlie
dev_priv live always, and add AGP detection in kernel patch: radeon-pre-2.patch From: Jon Smirl
2004-07-25sync up with current 2.6 kernel bk tree - mostly __user annotationsDave Airlie
2004-05-18add R200_EMIT_RB3D_BLENDCOLOR state packet to support GL_EXT_blend_color,Roland Scheidegger
GL_EXT_blend_func_separate and GL_EXT_blend_equation_separate on r200
2004-04-10white space changes to align with kernelDave Airlie
2004-03-12Fixes need to clean up the mess I made with the mesa merge. This codeJon Smirl
allows the mesa drivers to use a single definition of the DRM sarea/IOCTLS located in the drm driver directory. Adjustments were made to the 2D drivers to not include these changes. Changes to the mesa copy of DRM were copied to the DRI copy. XFree86 bug: Reported by: Submitted by: Reviewed by: Obtained from:
2003-11-04Memory layout transition:Michel Daenzer
the 2D driver initializes MC_FB_LOCATION and related registers sanely the DRM deduces the layout from these registers clients use the new SETPARAM ioctl to tell the DRM where they think the framebuffer is located in the card's address space the DRM uses all this information to check client state and fix it up if necessary This is a prerequisite for things like direct rendering with IGP chips and video capturing.
2003-08-26Remove artificial PCI GART limitations, rename AGP to GART whereMichel Daenzer
appropriate
2003-08-08Added some information as to when (which DRM version) various queries wereIan Romanick
added.
2003-06-10Texture rectangle support for r100Keith Whitwell
2003-05-20DRM part of Radeon DRI suspend/resume support (Charl Botha).David Dawes
2003-04-30Merged texmem-0-0-1Ian Romanick
2003-04-22add more get_param queries for embedded projectKeith Whitwell
2003-02-21Merge from bsd-4-0-0-branch.Eric Anholt
2003-02-03Fix size of VERTEX2 ioctl struct (Egbert Eich)Keith Whitwell
2002-10-29updated e-mail addresses for Keith, Alan and JensJens Owen
2002-10-29preserve CRTC{,2}_OFFSET_CNTL in 2D driver to avoid bad effects whenMichel Daenzer
pageflipping after a mode switch take current page into account in AdjustFrame(); writing the CRTC offset via the CP was probably a bad idea as this can happen asynchronously, reverted take frame offset into account when flipping pages handle CRTC2 as well for pageflipping (untested) preserve GEN_INT_CNTL on mode switches to prevent interrupts from getting disabled
2002-10-28merge from mesa-4-1-branch to get cube-map registers. bumped version to 1.7Brian Paul
2002-09-25change RADEON_PARAM_IRQ_ACTIVE to RADEON_PARAM_IRQ_NRMichel Daenzer
2002-09-23merged r200-0-2-branch to trunkKeith Whitwell
2002-08-26merged r200-0-1-branchKeith Whitwell
2002-07-11Don't read scratch registers directly, obtain the values via the GET_PARAMMichel Daenzer
ioctl. The DRM reads them from memory addresses the chip writes to on updates. Fall back to reading the registers directly with an old DRM. (Tim Smith, cleanups by myself)
2002-07-05merged bsd-3-0-0-branchAlan Hourihane