| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-07-15 | drm: add fix for PAT on radeon with 2.6.26 | Dave Airlie | |
| 2008-06-15 | radeon: *really* fix screen corruption thanks to Lukasz Krotowski | Jerome Glisse | |
| 2008-06-13 | radeon: r345xx fixe hard lockup | Jerome Glisse | |
| This patch should fixe hard lockup and convert them in softlockup (ie you can ssh the box but the gpu is busted and we are waiting in loop for it to come back to reason). | |||
| 2008-06-11 | RADEON: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT | Alex Deucher | |
| According to the hw guys, you should use DSTCACHE_CTLSTAT to flush the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT. | |||
| 2008-06-09 | RADEON: Add untested support for RS400 chips | Alex Deucher | |
| GART setup appears to work the same as RS480 chips. Also RC4xx chips are actually RS400 based, not RS480 based. | |||
| 2008-06-09 | RADEON: switch IGP gart to use radeon_write_agp_base() | Alex Deucher | |
| 2008-06-05 | radeon: Restore software interrupt on resume. | Dennis Kasprzyk | |
| Fixes performance drop after suspend/resume on some systems. | |||
| 2008-05-30 | RADEON: fix typo in last commit | Alex Deucher | |
| 2008-05-30 | r500: attempt to make AGP work by programming agp base in the MC correctly | Dave Airlie | |
| 2008-05-28 | radeon: split microcode out into a separate header file. | Dave Airlie | |
| 2008-05-27 | RADEON: add get_param for number of GB pipes | Alex Deucher | |
| 2008-05-13 | RS4xx: separate out RS400 and RS480 IGP chips | Alex Deucher | |
| RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480. | |||
| 2008-05-12 | RADEON: fix copy/pasto in last commit | Alex Deucher | |
| 2008-05-12 | R3/4/5: init pipe setup in drm | Alex Deucher | |
| Similar (broken) code in mesa needs to be removed | |||
| 2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
| 2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
| 2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
| 2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
| 2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
| 2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
| first step in merging rs4xx/rs6xx gart setup | |||
| 2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
| 2008-03-19 | RADEON: switch over to new production microcode | Alex Deucher | |
| This needs to be tested thoroughly before pushing to the kernel. | |||
| 2008-03-19 | RADEON: production microcode for all radeons, r1xx-r6xx | Alex Deucher | |
| This updated microcode is not in use yet. | |||
| 2008-03-17 | drm/pcigart: fix the pci gart to use the drm_pci wrapper. | Dave Airlie | |
| This is the correct fix for the RS690 and hopefully the dma coherent work. For now we limit everybody to a 32-bit DMA mask but it is possible for RS690 to use a 40-bit DMA mask for the GART table itself, and the PCIE cards can use 40-bits for the table entries. Signed-off-by: Dave Airlie <airlied@redhat.com> | |||
| 2008-03-16 | drm/rs690: set AGP_BASE_2 to 0 | Dave Airlie | |
| 2008-03-16 | drm: set rs690 gart base completly. | Dave Airlie | |
| The docs state bits 4-11 represent bits 32-39 of a 40-bit address | |||
| 2008-01-27 | drm: add initial rs690 support for drm. | Maciej Cencora | |
| This adds support for configuring the RS690 GART. | |||
| 2008-01-03 | drm: cleanup DRM_DEBUG() parameters | Márton Németh | |
| As DRM_DEBUG macro already prints out the __FUNCTION__ string (see drivers/char/drm/drmP.h), it is not worth doing this again. At some other places the ending "\n" was added. airlied:- I cleaned up a few that this patch missed also | |||
| 2007-12-10 | Merge branch 'master' into r500-support | Dave Airlie | |
| 2007-12-02 | bsd: Replace other occurrences of msleep with mtx_sleep | Robert Noland | |
| 2007-11-27 | r500: add a bunch of all r5xx pci ids.. | Dave Airlie | |
| fix up a range that may be needed for r500 mesa | |||
| 2007-11-20 | radeon: add initial r5xx support | Dave Airlie | |
| 2007-11-18 | radeon: refactor out the fb/agp location read/write. | Dave Airlie | |
| Add a new get param to get the fb location into userspace. Mesa currently hits MMIO to do this, but this isn't always possible. | |||
| 2007-11-05 | drm: remove lots of spurious whitespace. | Dave Airlie | |
| Kernel "cleanfile" script run. | |||
| 2007-11-03 | radeon: set the address to access the aperture on the CPU side correctly | Dave Airlie | |
| This code relied on the CPU and GPU address for the aperture being the same, On some r5xx hardware I was playing with I noticed that this isn't always true. I wonder if this will fix some of those r4xx DRI issues we've seen in the past. | |||
| 2007-07-20 | Replace DRM_IOCTL_ARGS with (dev, data, file_priv) and remove DRM_DEVICE. | Eric Anholt | |
| The data is now in kernel space, copied in/out as appropriate according to the This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal with those failures. This also means that XFree86 4.2.0 support for i810 DRM is lost. | |||
| 2007-07-20 | Replace filp in ioctl arguments with drm_file *file_priv. | Eric Anholt | |
| As a fallout, replace filp storage with file_priv storage for "unique identifier of a client" all over the DRM. There is a 1:1 mapping, so this should be a noop. This could be a minor performance improvement, as everything on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls went the other direction. | |||
| 2007-07-20 | Remove DRM_ERR OS macro. | Eric Anholt | |
| This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code. | |||
| 2007-07-16 | drm: remove drm_buf_t | Dave Airlie | |
| 2007-07-16 | drm: remove drmP.h internal typedefs | Dave Airlie | |
| 2007-07-16 | drm: detypedef drm.h and fixup all problems | Dave Airlie | |
| 2007-06-08 | r300: Added the CP maximum fetch size and ring rptr update variables. | Oliver McFadden | |
| 2007-06-03 | radeon: add support for vblank on crtc2 | Dave Airlie | |
| This add support for CRTC2 vblank on radeon similiar to the i915 support | |||
| 2007-05-26 | whitespace fixups from kernel | Dave Airlie | |
| 2007-04-28 | remove DRM_GETSAREA and replace with drm_getsarea function | Dave Airlie | |
| 2007-04-09 | rs480: Renamed some unknown registers. See dri-devel list. | Oliver McFadden | |
| 2007-04-09 | radeon: add support for reverse engineered xpress200m | Dave Airlie | |
| The IGPGART setup code was traced using mmio-trace on fglrx by myself and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel. This code doesn't let the 3D driver work properly as the card has no vertex shader support. Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this work on. | |||
| 2007-03-04 | radeon: make PCI GART aperture size variable, but making table size variable | Dave Airlie | |
| This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0 | |||
| 2007-03-04 | ati: make pcigart code able to handle variable size PCI GART aperture | Dave Airlie | |
| This code doesn't enable a variable aperture it just modifies the codebase to allow me fix it up later | |||
| 2007-01-11 | radeon: Fix u32 overflows when determining AGP base address in card space. | Michel Dänzer | |
| The overflows could lead to the AGP aperture overlapping the framebuffer area in the card's address space when the latter is located at the very end of the 32 bit address space, which would result in a freeze on X server startup, probably because the card read commands from the framebuffer instead of from AGP. See http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=392915 . | |||
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index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
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