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path: root/shared-core/nv50_graph.c
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2008-09-17nv50: add initial context for chipset 0xaaBen Skeggs
This just doesn't look right..
2008-09-17nv50: add initial context to match ctxprog for chipset 0x50Ben Skeggs
2008-09-17nv50: add ctxprog for chipset 0x50Ben Skeggs
2008-09-17nv50: add ctxprog for chipset 0xaaBen Skeggs
2008-09-17nv50: add support for chipset 0x92Ben Skeggs
2008-05-02nouveau: guard against channels potentially not having a context, fix nv50Ben Skeggs
2008-05-01nv50: I cave... Add nv84 initial context values.Ben Skeggs
I swore I'd actually do this properly and not go the horrible route we did with nv4x, but I won't get around to it just yet with so many *actually* interesting things to do first.. One day. Since someone already added nv86, why not!
2008-03-30nouveau: forgot to add a breakMaarten Maathuis
2008-03-30nouveau: Add ctx values for nv86.Maarten Maathuis
- Note that this may not work for all nv86.
2008-01-07nv50: more small changesBen Skeggs
2008-01-07nv50: abort on chips without ctx ucodeBen Skeggs
2008-01-07nv50: some needed ctx valsBen Skeggs
2008-01-07nv50: some cleanups + small changesBen Skeggs
2008-01-06nouveau: Add ctx_voodoo for NV86Jeremy Kolb
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-08-08nouveau/nv50: hack up initial channel context from current stateBen Skeggs
We really should be providing static values like the nv40 PGRAPH code does, however, this will do for now to keep X at least working.
2007-08-08nouveau: enable/disable engine-specific interrupts in _init()/_takedown()Ben Skeggs
All interrupts are still masked by PMC until init is finished.
2007-08-06nouveau: Pass channel struct around instead of channel id.Ben Skeggs
2007-07-20Remove DRM_ERR OS macro.Eric Anholt
This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code.
2007-07-17nouveau: G8x PCIEGARTBen Skeggs
Actually a NV04-NV50 ttm backend for both PCI and PCIEGART, but PCIGART support for G8X using the current mm has been hacked on top of it.
2007-07-13nouveau: nuke internal typedefs, and drm_device_t use.Ben Skeggs
2007-07-09nouveau/nv50: Initial channel/object supportBen Skeggs
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80.
2007-06-28nouveau/nv50: skeletal backendBen Skeggs