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path: root/shared-core/nv20_graph.c
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2008-08-19nouveau: fifo and graphics engine suspend and resume for nv04-nv4xroot
Corresponding DDX patch at http://people.freedesktop.org/~stuart/nv0x-nv4x_suspend/
2008-02-04nouveau: make nv34 work every time, not just every 2nd timeStuart Bennett
And make nv30_graph_init a bit more like mmio-traces
2008-01-04[PATCH] nouveau: Fix nv20/30 context loadingStuart Bennett
Don't set the context as valid until it has been loaded
2007-12-15Revert "nouveau: nv30: missing ramin init, does it brake other hw?"Patrice Mandin
This reverts commit 46235ea4595152d8dd5f016c18c6845a77db30b0.
2007-11-15nouveau: revert the nv34 context size change, it was not the culprit after all.Stephane Marchesin
2007-11-14nouveau: nv30: missing ramin init, does it brake other hw?Patrice Mandin
2007-11-14nouveau: adjust the size of the NV34 context. That fixes mobile PPC cards.Stephane Marchesin
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-11-04nouveau: more nv20_graph_init.Pekka Paalanen
This patch is originally from malc0_, but since it used some NV40_* regs, I edited them into hex values with a comment. This seems to correspond quite well with my own mmio-trace, for the parts I cared to check.
2007-10-30Nouveau: fold some loops.Stephane Marchesin
2007-10-26nouveau: flip the CHECK_STATE bit off on nv30. This lets you do 8-bit ↵Stephane Marchesin
surface destination.
2007-10-12nouveau: Fix a typo in nv25_graph_context_initPekka Paalanen
2007-10-12nouveau: Fix typos in nv20_graph_context_initStuart Bennett
2007-10-04nouveau: nv2a drm context switch support.Stephane Marchesin
2007-10-02nouveau: nv20 graph_create_context differencePekka Paalanen
nv20 writes the chan->id to a different place than nv28. This still does not make nv20 run nv10_demo.
2007-10-02nouveau: fix nv25_graph_context_initPekka Paalanen
It was writing 4x the data in a loop.
2007-10-02nouveau: nv20 graph context initStuart Bennett
2007-10-01nouveau: flip the ctx switch bit on. it seems to be ignored on nv34 but ↵Stephane Marchesin
causes nv30 issues.
2007-09-30nouveau : nv30 remove harcoded NV20_PGRAPH_CHANNEL_CTX_TABLEMatthieu Castet
2007-09-30nouveau : nv20_graph replace nouveau_graph_wait_idle by nouveau_wait_for_idleMatthieu Castet
Also clean PGRAPH_CHANNEL macros
2007-09-30nouveau: rename nv30_graph.c to nv20_graph.cPekka Paalanen
2007-09-30nouveau: nv30 graph function renames, removed nv20_graph.cPekka Paalanen
All nv30 functions in nv30_graph.c that can be used on nv20 are renamed as accordingly. nv20 specific parts from nv20_graph.c are moved into nv30_graph.c.
2007-09-30nouveau: let nv20 hardware do ctx switching automatically.Pekka Paalanen
2007-09-30nouveau: Make nv20 use the nv30 PGRAPH ctx functions.Pekka Paalanen
2007-08-08nouveau: enable/disable engine-specific interrupts in _init()/_takedown()Ben Skeggs
All interrupts are still masked by PMC until init is finished.
2007-08-06nouveau: Pass channel struct around instead of channel id.Ben Skeggs
2007-07-20Remove DRM_ERR OS macro.Eric Anholt
This was used to make all ioctl handlers return -errno on linux and errno on *BSD. Instead, just return -errno in shared code, and flip sign on return from shared code to *BSD code.
2007-07-17nouveau: Destroy PGRAPH context table on PGRAPH takedownBen Skeggs
2007-07-13nouveau: nuke internal typedefs, and drm_device_t use.Ben Skeggs
2007-07-09nouveau/nv50: Initial channel/object supportBen Skeggs
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80.
2007-07-09nouveau: rewrite gpu object codeBen Skeggs
Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object.
2007-06-24nouveau: NV04/NV10/NV20 PGRAPH engtab functionsBen Skeggs
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about how they work to implement them sanely. The "old" context_switch() code remains hooked up, so it shouldn't break anything. NV20 will probably break if load_context() works. No inital context values are filled in, so when the first channel is created PGRAPH will probably end up having its state zeroed. Some setup from nv20_graph_init() will probably need to be moved to the per-channel context setup.
2007-04-01nouveau: fix usage of PGRAPH_CTX_CONTROL on nv20+Matthieu Castet
http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=17985f07d68322519919a7f629a6d2d9bf3916ed could have broken some nvxx_graph code : it rename NV03_PGRAPH_CTX_CONTROL to NV10_PGRAPH_CTX_CONTROL, but forgot to update it in nvxx_graph file. Also when migrating init stuff in http://gitweb.freedesktop.org/?p=mesa/drm.git;a=commitdiff;h=674cefd4fe4b537a20a10edcb4ec5df55facca8e, NV04_PGRAPH_CTX_CONTROL is used everywhere but the old ddx code use NV_PGRAPH_CTX_CONTROL_NV04 or NV_PGRAPH_CTX_CONTROL.
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-02-03nouveau: rename registers to their proper names.Stephane Marchesin
2007-01-14nouveau: opps nv20 ctx ramin size was wrongMatthieu Castet
2007-01-13nouveau: opps restored the wrong channelMatthieu Castet
2007-01-13nouveau: nv20 graph ctx switch.Matthieu Castet
Untested...
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