Age | Commit message (Collapse) | Author |
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This should improve multi fifo
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Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
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Allows multiple references to a single object, needed to support PCI(E)GART
scatter-gather DMA objects which would quickly fill PRAMIN if each channel
had its own.
Handle per-channel private instmem areas. This is needed to support NV50,
but might be something we want to do on earlier chipsets at some point?
Everything that touches PRAMIN is a GPU object.
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Can't use nv04 code for them, since an extra field was inserted into
RAMFC after DMA_PUT/GET.
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
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