Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-04-06 | nouveau: make a note about a bit that breaks some cards | Ben Skeggs | |
2007-03-26 | nouveau: move card initialisation into the drm | Ben Skeggs | |
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E | |||
2007-03-07 | nouveau: remove a hack that's not needed since the last interface change. | Ben Skeggs | |
2007-02-28 | nouveau: intrusive drm interface changes | Ben Skeggs | |
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING. | |||
2007-02-06 | nouveau: more work on the nv04 context switch code. | Stephane Marchesin | |
2007-02-03 | nouveau: cleanup the nv04 pgraph save/restore mechanism. | Stephane Marchesin | |
2007-02-03 | nouveau: rename registers to their proper names. | Stephane Marchesin | |
2007-02-03 | nouveau: add NV04 registers required for PGRAPH context switching. | Stephane Marchesin | |
2007-01-26 | nouveau: add extra pgraph registers | Patrice Mandin | |
2007-01-13 | nouveau: nv20 graph ctx switch. | Matthieu Castet | |
Untested... | |||
2007-01-13 | nouveau: add and indent pgraph regs | Matthieu Castet | |
2007-01-13 | nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value. | Stephane Marchesin | |
2007-01-12 | nouveau: get nv30 context switching to work. | Jeremy Kolb | |
* Pulled in some registers from nv10reg.h. Needed for context switching. * Filled in nv30 graphics context (based on nv40_graph.c). * Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work. | |||
2007-01-06 | nouveau: Use PMC_BOOT_0 to determine which ctx_voodoo to load. | Ben Skeggs | |
2007-01-05 | Cleanup the nv04 fifo code a bit. | Stephane Marchesin | |
2006-11-28 | For nv10, bit 16 of RAMFC need to be set for 64 bytes fifo context. | Matthieu Castet | |
When cleaning a fifo, we shouldn't assume everybody use nv40 ;) Fill DMA_SUBROUTINE fill correct value. | |||
2006-11-14 | Completely untested NV10/20/30 FIFO context switching changes. | Ben Skeggs | |
2006-11-14 | Restructure initialisation a bit. | Ben Skeggs | |
- Do important card init in firstopen - Give each channel it's own cmdbuf dma object - Move RAMHT config state to the same place as RAMRO/RAMFC - Make sure instance mem for objects is *after* RAM{FC,HT,RO} | |||
2006-11-06 | fixup fifo size so it is page aligned | Dave Airlie | |
2006-10-18 | Remove hack which delays activation of a additional channel. The previously ↵ | Ben Skeggs | |
active channel's state is saved to RAMFC before PFIFO gets clobbered. | |||
2006-10-17 | Useful output on a FIFO error interrupt. | Ben Skeggs | |
2006-10-17 | Setup NV40 RAMFC (in wrong location.. but anyway), rearrange the RAMFC setup ↵ | Ben Skeggs | |
code a bit. | |||
2006-10-17 | Some info on NV40's RAMFC | Ben Skeggs | |
2006-10-12 | Still more work on the context switching code. | Stephane Marchesin | |
2006-10-11 | Context switching work. | Stephane Marchesin | |
Added preliminary support for context switches (triggers the interrupts, but hangs after the switch ; something's not quite right yet). Removed the PFIFO_REINIT ioctl. I hope it's that a good idea... Requires the upcoming commit to the DDX. | |||
2006-08-27 | initial import of nouveau code from nouveau CVS | Dave Airlie | |