| Age | Commit message (Collapse) | Author |
|---|
|
Patch allows the backlight to be manipulated under gnome on apple powerpc
based NV30 machines. It works fine on my powerbook, and should also work
for older NV17/NV18 machines.
Note that older powerpc specific tools (pbbuttonsd) have some problems with
this implementation (because the device is not yet there at the start time
of the daemon, and the code makes incorrect assumptions about the max
brightness values). However, IMHO these things can and should be addressed
in the daemon.
Some style/warning fixes applied by Stuart Bennett <stuart@freedesktop.org>
|
|
NV04 had a PFB_FIFO_DATA at the same address, which we don't use, so
remove it to reduce confusion
|
|
Several nvidia-based systems don't support backlight control via the
standard ACPI control mechanisms. Instead, it's necessary for the driver
to modify the backlight control registers directly. This patch adds
support for determining whether the registers appear to be in use, and
if so registers a kernel backlight device to control them. The backlight
can then be controlled via existing userspace tools.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
|
|
This reverts commit 6656db10551bbb8770dd945b6d81d5138521f208.
We really just want the libdrm and ioctl bits, not all the driver
stuff.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
- Moved the fix from the ddx to drm, because it seemed more appropriate.
- Don't be shy, report if it works for you or not.
|
|
This is necessary for AGP to work after running bios init scripts on nv3x, and
is seen in mmio traces of all cards (nv04-nv4x)
I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt)
use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know
the effects of using the wrong one
|
|
|
|
|
|
|
|
Kernel "cleanfile" script run.
|
|
|
|
|
|
Also clean PGRAPH_CHANNEL macros
|
|
|
|
- fix offset for nv04
- use it in nv10 graph ctx switch for getting next channel
- dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
|
|
|
|
|
|
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
|
|
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE.
The prefix NV03 is chosen because nv10reg.h had no versioned prefix,
and the code using these registers does not check card_type.
|
|
|
|
Should be OK on G84 for a single channel, multiple channels *almost* work.
Untested on G80.
|
|
|
|
|
|
|
|
|
|
The PGRAPH init for the various cards will need cleaning up at some point,
a lot of the values written there are per-context state left over from the
all the hardcoding done in the ddx.
It's possible some cards get broken by this commit, let me know.
Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
|
|
|
|
graphics objects:
- No longer takes flags/dmaobj parameters, requires some major changes
to the ddx to setup the object through the FIFO. This change is
likely to cause breakages on some cards (tested on NV05,NV28,NV35,
NV40 and NV4E).
dma objects:
- now takes a "class" parameter, not really used yet but we may need
it at some point.
- parameters are checked, so clients can't randomly create DMA objects
pointing at whatever they feel like.
misc:
- Added FB_SIZE/AGP_SIZE getparams
- Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR
- Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't
NOTIFICATION_PENDING.
|
|
|
|
|
|
|
|
|
|
|
|
Untested...
|
|
|
|
|
|
* Pulled in some registers from nv10reg.h. Needed for context switching.
* Filled in nv30 graphics context (based on nv40_graph.c).
* Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work.
|
|
|
|
|
|
When cleaning a fifo, we shouldn't assume everybody use nv40 ;)
Fill DMA_SUBROUTINE fill correct value.
|
|
|
|
- Do important card init in firstopen
- Give each channel it's own cmdbuf dma object
- Move RAMHT config state to the same place as RAMRO/RAMFC
- Make sure instance mem for objects is *after* RAM{FC,HT,RO}
|
|
|
|
active channel's state is saved to RAMFC before PFIFO gets clobbered.
|
