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path: root/shared-core/nouveau_irq.c
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2008-05-02nv50: enable 0x400500 bit 0 after PGRAPH exception alsoBen Skeggs
No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :)
2008-05-02nouveau: guard against channels potentially not having a context, fix nv50Ben Skeggs
2008-05-02nouveau: disable all card interrupts when unknown PFIFO IRQ occurs.Ben Skeggs
This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet.
2008-05-02nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handlerBen Skeggs
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown.
2008-05-02nouveau: gather nsource in trap_info()Ben Skeggs
The IRQ handling stuff really is a mess.. On the TODO :)
2008-05-02nv50: PGRAPH exception handling completely different from earlier chipsBen Skeggs
2008-04-05nv50: primitive i2c interrupt handlerMaarten Maathuis
2008-04-03nv50: primitive display interrupt handler.Maarten Maathuis
2008-01-22Merge branch 'master' into vblank-rework, including mach64 supportJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_irq.c shared-core/radeon_irq.c shared-core/via_irq.c Mostly trivial conflicts. mach64 support from Mathieu Bérard.
2007-11-14nouveau: funcs to determine active channel on PFIFO.Ben Skeggs
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
Kernel "cleanfile" script run.
2007-11-05nouveau: Use a sw method instead of notify interrupt to signal fence completion.Ben Skeggs
2007-11-05nouveau: cleanupsBen Skeggs
2007-11-05nouveau: only pass annoying messages if irq isn't handled fully.Ben Skeggs
2007-11-05nouveau: hook up an inital fence irq handlerBen Skeggs
2007-10-30Merge branch 'master' into vblank-rework, fixup remaining driversJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_irq.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_drv.h shared-core/mga_irq.c shared-core/radeon_drv.h shared-core/radeon_irq.c Merge in the latest master bits and update the remaining drivers (except mach64 which math_b is working on). Also remove the 9xx hack from the i915 driver; it seems to be correct.
2007-10-16nouveau: Cleanup PGRAPH handler, attempt to survive PGRAPH exceptions.Ben Skeggs
2007-10-16nouveau: Survive PFIFO_CACHE_ERROR.Ben Skeggs
2007-10-16nouveau: Handle multiple PFIFO exceptions per irq, cleanup output.Ben Skeggs
2007-10-12nouveau: mandatory "oops I forgot half of the files" commitArthur Huillet
2007-10-10nouveau : nv10 and nv04 PGRAPH_NSTATUS are differentMatthieu Castet
2007-10-06nouveau : print correct value in nouveau_graph_dump_trap_info for nv04Matthieu Castet
2007-09-30nouveau: let nv20 hardware do ctx switching automatically.Pekka Paalanen
2007-09-30nouveau: NV30 should never call nouveau_nv20_context_switch().Pekka Paalanen
2007-08-26nouveau : add NV04_PGRAPH_TRAPPED_ADDR definitionMatthieu Castet
- fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+
2007-08-09nouveau: silence irq handler a bitBen Skeggs
2007-08-08nouveau: return channel idBen Skeggs
2007-08-08nouveau: enable/disable engine-specific interrupts in _init()/_takedown()Ben Skeggs
All interrupts are still masked by PMC until init is finished.
2007-08-07nouveau : fix enable irq (in the previous code all irq were masked by engineMatthieu Castet
init after irq_postinstall)
2007-08-06nouveau: Determine trapped channel id from active grctx on >=NV40Ben Skeggs
2007-07-18nouveau: Add bitfield names for NSOURCE and NSTATUS.Pekka Paalanen
Name strings and pretty-printing in nouveau_graph_dump_trap_info().
2007-07-18nouveau: Replace 0x00400104 and 0x00400108 with names.Pekka Paalanen
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. The prefix NV03 is chosen because nv10reg.h had no versioned prefix, and the code using these registers does not check card_type.
2007-07-14nouveau: nv10 and nv11/15 are differentPatrice Mandin
2007-07-13nouveau: nuke internal typedefs, and drm_device_t use.Ben Skeggs
2007-07-09nouveau/nv50: Initial channel/object supportBen Skeggs
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80.
2007-07-09nouveau: enable reporting for all PFIFO/PGRAPH irqsBen Skeggs
2007-05-08nouveau : fix fifo context size for nv10Matthieu Castet
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-07nouveau: ack PFIFO interrupts at PFIFO, not PMC.Ben Skeggs
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING.
2007-02-03nouveau: and of course, I was missing the last nv04 piece.Stephane Marchesin
2007-02-03nouveau: rename registers to their proper names.Stephane Marchesin
2007-01-25nouveau: always print nsource/nstatus regs on PGRAPH errorsBen Skeggs
2007-01-17nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.Jeremy Kolb
Hook into nv20 pgraph switching functions (they're identical for nv3x). Actually call nv30_pgraph_context_init so the ctx_table is allocated. Thanks to Carlos Martin for the help.
2007-01-13nouveau: nv20 graph ctx switch.Matthieu Castet
Untested...
2007-01-13nouveau: first step to make graph ctx worksMatthieu Castet
It is still not working, but now we could use some 3D commands without needed to run nvidia blob before.
2007-01-05Add basic pgraph context for nv10.Matthieu Castet
It only fake a context switch : pgraph state are not save/restored.
2006-11-21Don't spam dmesg if PMC_INTSTAT is 0Ben Skeggs
2006-11-17Dump some useful info when a PGRAPH error occurs.Ben Skeggs
The "channel" detect doesn't work on my nv40, but the rest seems to produce sane info.
2006-10-18Oops, we have more than 4 subchannels..Ben Skeggs
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