Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-08-09 | NV50: minor changes | Maarten Maathuis | |
2008-08-09 | NV50: enable hotplug irq | Maarten Maathuis | |
2008-06-27 | NV50: use list_head item instead of list_head head to avoid confusion | Maarten Maathuis | |
2008-06-22 | NV50: Initial import of kernel modesetting. | Maarten Maathuis | |
2008-05-02 | nv50: enable 0x400500 bit 0 after PGRAPH exception also | Ben Skeggs | |
No solid idea about what these 2 bits do, but nv50 can now survive a few PGRAPH exceptions just as nv40 does :) | |||
2008-05-02 | nouveau: guard against channels potentially not having a context, fix nv50 | Ben Skeggs | |
2008-05-02 | nouveau: disable all card interrupts when unknown PFIFO IRQ occurs. | Ben Skeggs | |
This is possibly temporary. I can trigger an unending IRQ storm on G8x in some circumstances, and have no idea how to handle that particular PFIFO exception correctly yet. | |||
2008-05-02 | nouveau: restore original NV_PFIFO_CACHES_REASSIGN value in fifo handler | Ben Skeggs | |
Doesn't fix any issue I've seen, but is a potential issue if a FIFO IRQ occurs during channel creation/takedown. | |||
2008-05-02 | nouveau: gather nsource in trap_info() | Ben Skeggs | |
The IRQ handling stuff really is a mess.. On the TODO :) | |||
2008-05-02 | nv50: PGRAPH exception handling completely different from earlier chips | Ben Skeggs | |
2008-04-05 | nv50: primitive i2c interrupt handler | Maarten Maathuis | |
2008-04-03 | nv50: primitive display interrupt handler. | Maarten Maathuis | |
2008-01-22 | Merge branch 'master' into vblank-rework, including mach64 support | Jesse Barnes | |
Conflicts: linux-core/drmP.h linux-core/drm_drv.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_irq.c shared-core/radeon_irq.c shared-core/via_irq.c Mostly trivial conflicts. mach64 support from Mathieu BĂ©rard. | |||
2007-11-14 | nouveau: funcs to determine active channel on PFIFO. | Ben Skeggs | |
2007-11-05 | drm: remove lots of spurious whitespace. | Dave Airlie | |
Kernel "cleanfile" script run. | |||
2007-11-05 | nouveau: Use a sw method instead of notify interrupt to signal fence completion. | Ben Skeggs | |
2007-11-05 | nouveau: cleanups | Ben Skeggs | |
2007-11-05 | nouveau: only pass annoying messages if irq isn't handled fully. | Ben Skeggs | |
2007-11-05 | nouveau: hook up an inital fence irq handler | Ben Skeggs | |
2007-10-30 | Merge branch 'master' into vblank-rework, fixup remaining drivers | Jesse Barnes | |
Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_irq.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_drv.h shared-core/mga_irq.c shared-core/radeon_drv.h shared-core/radeon_irq.c Merge in the latest master bits and update the remaining drivers (except mach64 which math_b is working on). Also remove the 9xx hack from the i915 driver; it seems to be correct. | |||
2007-10-16 | nouveau: Cleanup PGRAPH handler, attempt to survive PGRAPH exceptions. | Ben Skeggs | |
2007-10-16 | nouveau: Survive PFIFO_CACHE_ERROR. | Ben Skeggs | |
2007-10-16 | nouveau: Handle multiple PFIFO exceptions per irq, cleanup output. | Ben Skeggs | |
2007-10-12 | nouveau: mandatory "oops I forgot half of the files" commit | Arthur Huillet | |
2007-10-10 | nouveau : nv10 and nv04 PGRAPH_NSTATUS are different | Matthieu Castet | |
2007-10-06 | nouveau : print correct value in nouveau_graph_dump_trap_info for nv04 | Matthieu Castet | |
2007-09-30 | nouveau: let nv20 hardware do ctx switching automatically. | Pekka Paalanen | |
2007-09-30 | nouveau: NV30 should never call nouveau_nv20_context_switch(). | Pekka Paalanen | |
2007-08-26 | nouveau : add NV04_PGRAPH_TRAPPED_ADDR definition | Matthieu Castet | |
- fix offset for nv04 - use it in nv10 graph ctx switch for getting next channel - dump NV10_PGRAPH_TRAPPED_DATA_HIGH on nv10+ | |||
2007-08-09 | nouveau: silence irq handler a bit | Ben Skeggs | |
2007-08-08 | nouveau: return channel id | Ben Skeggs | |
2007-08-08 | nouveau: enable/disable engine-specific interrupts in _init()/_takedown() | Ben Skeggs | |
All interrupts are still masked by PMC until init is finished. | |||
2007-08-07 | nouveau : fix enable irq (in the previous code all irq were masked by engine | Matthieu Castet | |
init after irq_postinstall) | |||
2007-08-06 | nouveau: Determine trapped channel id from active grctx on >=NV40 | Ben Skeggs | |
2007-07-18 | nouveau: Add bitfield names for NSOURCE and NSTATUS. | Pekka Paalanen | |
Name strings and pretty-printing in nouveau_graph_dump_trap_info(). | |||
2007-07-18 | nouveau: Replace 0x00400104 and 0x00400108 with names. | Pekka Paalanen | |
NV03_PGRAPH_NSTATUS and NV03_PGRAPH_NSOURCE. The prefix NV03 is chosen because nv10reg.h had no versioned prefix, and the code using these registers does not check card_type. | |||
2007-07-14 | nouveau: nv10 and nv11/15 are different | Patrice Mandin | |
2007-07-13 | nouveau: nuke internal typedefs, and drm_device_t use. | Ben Skeggs | |
2007-07-09 | nouveau/nv50: Initial channel/object support | Ben Skeggs | |
Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. | |||
2007-07-09 | nouveau: enable reporting for all PFIFO/PGRAPH irqs | Ben Skeggs | |
2007-05-08 | nouveau : fix fifo context size for nv10 | Matthieu Castet | |
2007-03-26 | nouveau: move card initialisation into the drm | Ben Skeggs | |
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E | |||
2007-03-07 | nouveau: ack PFIFO interrupts at PFIFO, not PMC. | Ben Skeggs | |
2007-02-28 | nouveau: intrusive drm interface changes | Ben Skeggs | |
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING. | |||
2007-02-03 | nouveau: and of course, I was missing the last nv04 piece. | Stephane Marchesin | |
2007-02-03 | nouveau: rename registers to their proper names. | Stephane Marchesin | |
2007-01-25 | nouveau: always print nsource/nstatus regs on PGRAPH errors | Ben Skeggs | |
2007-01-17 | nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet. | Jeremy Kolb | |
Hook into nv20 pgraph switching functions (they're identical for nv3x). Actually call nv30_pgraph_context_init so the ctx_table is allocated. Thanks to Carlos Martin for the help. | |||
2007-01-13 | nouveau: nv20 graph ctx switch. | Matthieu Castet | |
Untested... | |||
2007-01-13 | nouveau: first step to make graph ctx works | Matthieu Castet | |
It is still not working, but now we could use some 3D commands without needed to run nvidia blob before. |