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The frame count registers don't increment until the start of the next
frame, so make sure we return an incremented count if called during the
actual vblank period.
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Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read
vblank counter registers on disabled pipes (might hang otherwise). And
deal with flipped pipe/plane mappings if present.
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_irq.c
shared-core/radeon_irq.c
shared-core/via_irq.c
Mostly trivial conflicts.
mach64 support from Mathieu Bérard.
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This reverts commit bfc29606e4a818897eebca46a5e23bbe7bc3ce25.
This regresses i915 here for me I can't get greater than 0.333 fps with gears
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As DRM_DEBUG macro already prints out the __FUNCTION__ string (see
drivers/char/drm/drmP.h), it is not worth doing this again. At some
other places the ending "\n" was added.
airlied:- I cleaned up a few that this patch missed also
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The casting is safe only when the list_head member is the first member of
the structure.
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If drmMinor >= 6, the intel DDX driver will enable vblank events on both
pipes. If drmMinor >= 10 on pre-965 chipsets, the intel DDX driver will
swap the pipe<->plane mapping to allow for framebuffer compression on
laptop screens. This means the secondary vblank counter (corresponding
to pipe B) will be incremented when vblank interrupts occur.
Now Mesa waits for vblank events on whichever plane has a greater
portion of the displayed window. So it will happly ask to wait for the
primary counter even though that one won't increment.
So we can fix this in either the DDX driver, Mesa or the kernel (though
I thought we already had several times).
Since current (and previous) userspace assumes it's talking about a pipe
== plane situation and now uses planes when talking to the kernel, we
should probably just hide the mapping details there (indeed they already
are hidden there for vblank swaps), which this patch does.
So as far as userland is concerned, whether we call things planes or
pipes is irrelevant, as long as kernel developers understand that
userland hands them planes and they have to figure out which pipe that
corresponds to (which will typically be the same on 965+ hardware and
reversed on pre-965 mobile chips).
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This field isn't touched or read by any other code in the stack so it's
time to retire these last few references.
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Kernel "cleanfile" script run.
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_irq.c
shared-core/i915_drv.h
shared-core/i915_irq.c
shared-core/mga_drv.h
shared-core/mga_irq.c
shared-core/radeon_drv.h
shared-core/radeon_irq.c
Merge in the latest master bits and update the remaining drivers (except
mach64 which math_b is working on). Also remove the 9xx hack from the i915
driver; it seems to be correct.
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One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
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We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
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This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
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The data is now in kernel space, copied in/out as appropriate according to the
This results in DRM_COPY_{TO,FROM}_USER going away, and error paths to deal
with those failures. This also means that XFree86 4.2.0 support for i810 DRM
is lost.
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As a fallout, replace filp storage with file_priv storage for "unique
identifier of a client" all over the DRM. There is a 1:1 mapping, so this
should be a noop. This could be a minor performance improvement, as everything
on Linux dereferenced filp to get file_priv anyway, while only the mmap ioctls
went the other direction.
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This was used to make all ioctl handlers return -errno on linux and errno on
*BSD. Instead, just return -errno in shared code, and flip sign on return from
shared code to *BSD code.
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With this, all modules build again.
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- use a timer for disabling vblank events to avoid enable/disable calls too
often
- make i915 work with pre-965 chips again (would like to structure this
better, but this hack works on my test system)
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routine.
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Also use drm_calloc instead of drm_alloc and memset, and use the size of the
struct instead of the size of the pointer for allocation...
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- use correct refcount variable in get/put routines
- extract counter update from drm_vblank_get
- make signal handling callback per-crtc
- update interrupt handling logic, drivers should use drm_handle_vblank
- move wakeup and counter update logic to new drm_handle_vblank routine
- fixup usage of get/put in light of counter update extraction
- fix longstanding bug in signal code, update pending counter only
*after* we're sure we'll setup signal handling
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path. It doesn't appear to serve any useful purpose.
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- move pre/post modeset ioctl to core
- fixup i915 buffer swap
- fix outstanding signal count code
- create new core vblank init routine
- test (works with glxgears)
- simplify i915 interrupt handler
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of vblank interrupt in order to save power.
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This reverts commit feb68037784ac09e333a321d294fdb2d8c57a4c8.
This was a bad idea, the macro is actually a bit harder to convert
to a static for the other use cases
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i915_driver_irq_postinstall was forcing vblank interrupts to pipe A when
called with vblank interrupts disabled. This caused vblank interrupts to be
accidentally re-enabled when VT switching the X server. Instead, start the
driver with vblank interrupts enabled on pipe A to support older X servers,
but then leave control over the state to the X server if it is able to do so.
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breadcrumb updates that occur _AFTER_ we've read the breadcrumb really
generates a new IRQ.
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Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients
to modify it as well while they hold the HW lock, e.g. in order to sync pages
between pipes.
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Unfortunately, emitting asynchronous flips during vertical blank results in
tearing. So we have to wait for the previous vertical blank and emit a
synchronous flip.
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Pages are tracked independently on each pipe.
Bump the minor version for 3D clients to know page flipping is usable, and
bump driver date.
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It would clutter up the kernel output in a situation which is legitimate before
X.org 7.2 and handled correctly by the 3D driver.
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Previously, if there were several buffer swaps scheduled for the same vertical
blank, all but the first blit emitted stood a chance of exhibiting tearing. In
order to avoid this, split the blits along slices of each output top to bottom.
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Conflicts:
linux-core/drmP.h
linux-core/drm_drv.c
linux-core/drm_irq.c
linux-core/drm_stub.c
shared-core/drm.h
shared-core/i915_drv.h
shared-core/i915_irq.c
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(cherry picked from f6238cf6244b32bd84e3d2819963d7f5473867c8 commit)
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This fixes issues on X server startup with versions of xf86-video-intel that
enable the IRQ before they have a context ID.
(cherry picked from 7af93dd9849442270ec89cb4bbeef5bfd4f9e424 commit)
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