Age | Commit message (Collapse) | Author |
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modesetting-101
Conflicts:
linux-core/drm_drv.c
linux-core/drm_fops.c
linux-core/drm_objects.h
linux-core/drm_stub.c
shared-core/i915_dma.c
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These require that the status page be referenced by a pointer in GTT, rather
than phsyical memory. So, we have the X Server allocate that memory and tell
us the address, instead.
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into origin/modesetting-101
Conflicts:
linux-core/drm_crtc.c
linux-core/drm_fb.c
Lots of changes to merge with alanh's latest stuff:
o fix use of fb->pitch now that it has the right value
o add new helper for finding the CRTC given an FB
o fix new fb_probe/fb_remove functions to take a CRTC
o fixup callers of new FB routines
o port drm_fb changes to intel_fb
o check for errors after creating fb buffer object
o go back to using cfb_imageblit since the accel stubs aren't ready
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places).
Add new FB hooks to the drm driver structure and make i915 use them for an
Intel specific FB driver. This will allow acceleration and better handling
of the command stream.
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into origin/modesetting-101
Conflicts:
shared-core/i915_init.c - reconcile with airlied's new code
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We need to keep a list of user created fbs to nuke on master exit.
We also need to use the bo properly.
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When the kernel driver is loaded it sets up a lot of stuff..
it tears down the same stuff on unload.
This add a new map type called DRM_DRIVER which means the driver will clean the mapping up
and fix up the map cleaner
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code to be more general.
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into origin/modesetting-101
Conflicts:
linux-core/drm_crtc.c - trivial merge
linux-core/drm_crtc.h - trivial merge
linux-core/intel_display.c - crtc_config -> mode_config
shared-core/i915_dma.c - accommodate new init code in i915_init.c
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items to i915 private structure.
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This is required to use TTM to allocate the ring buffer.
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Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients
to modify it as well while they hold the HW lock, e.g. in order to sync pages
between pipes.
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The assumption is that synchronous flips are not isolated usually, and waiting
for all of them could result in stalling the pipeline for long periods of time.
Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the
same effect.
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Unfortunately, emitting asynchronous flips during vertical blank results in
tearing. So we have to wait for the previous vertical blank and emit a
synchronous flip.
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Pages are tracked independently on each pipe.
Bump the minor version for 3D clients to know page flipping is usable, and
bump driver date.
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Leave it to the client to wait for the flip to complete when necessary,
but wait for a previous flip to complete before emitting another one. This
should help avoid unnecessary stalling of the ring due to pending flips.
Call i915_do_cleanup_pageflip() unconditionally in preclose.
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Buffer object driver for via.
Some changes to buffer object driver callbacks.
Improve fence flushing.
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Fixed - to System memory copies are implemented by
flipping in a cache-coherent TTM,
blitting to it, and then flipping it out.
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Memory types are either fixed (on-card or pre-bound AGP) or not fixed
(dynamically bound) to an aperture. They also carry information about:
1) Whether they can be mapped cached.
2) Whether they are at all mappable.
3) Whether they need an ioremap to be accessible from kernel space.
In this way VRAM memory and, for example, pre-bound AGP appear
identical to the memory manager.
This also makes support for unmappable VRAM simple to implement.
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Yes, this driver supports the new memory manager, that is indicated by the
version number being >= 1.7.
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Fix buffer bound caching policy changing, Allow
on-the-fly changing of caching policy on bound buffers if the hardware
supports it.
Allow drivers to use driver-specific AGP memory types for TTM AGP pages.
Will make AGP drivers much easier to migrate.
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(cherry picked from 2627131e5d0c8cd5e3f0db06451c2e7ae7569b1b commit)
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This uses the core facility to schedule a driver callback that will be called
ASAP after the given vertical blank interrupt with the HW lock held.
(cherry picked from 257771fa290b62d4d2ad896843cf3a207978d0bb commit)
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When the vertical blank interrupt is enabled for both pipes, pipe A is
considered primary and pipe B secondary. When it's only enabled for one pipe,
it's always considered primary for backwards compatibility.
(cherry picked from 0c7d7f43610f705e8536a949cf2407efaa5ec217 commit)
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Bump driver minor and date.
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Check for NULL pointer in the i915 flush handler.
Remove i915_sync_flush declaration.
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In the intel case, we can associate a flush with a sequence.
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0x00 EXE fence. Signals when command stream interpreter has reached the point
where the fence was emitted.
0x01 FLUSH fence. Signals when command stream interpreter has reached the point
where the fence was emitted, and all previous drawing operations have been
completed and flushed.
Implements busy wait (for fastest response time / high CPU) and
lazy wait (User interrupt or timer driven).
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