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path: root/shared-core/i915_drv.h
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2008-06-06[intel] remove settable use_mi_batchbuffer_startKeith Packard
The driver can know what hardware requires MI_BATCH_BUFFER vs MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06[intel-gem] Use timers to retire requests periodically.Keith Packard
Without the user IRQ running constantly, there's no wakeup when the ring empties to go retire requests and free buffers. Use a 1 second timer to make that happen more often.
2008-06-06[intel-gem] Add explicit throttle ioctlKeith Packard
Instead of throttling and execbuffer time, have the application ask to throttle explicitly. This allows the throttle to happen less often, and without holding the DRM lock.
2008-05-30Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h shared-core/nouveau_state.c
2008-05-27[intel-gem] Replace idlelock usage with real lock acquisition.Eric Anholt
2008-05-28i915: fix BSD bh, DRI2 not uses anywhere elseDave Airlie
2008-05-27[i915] Fix typo in (unused) START_ADDR definition.Jie Luo
2008-05-27[FreeBSD] Add vblank-rework support and get drivers building.Robert Noland
The i915 driver now works again.
2008-05-26[i915] leave interrupts masked off when not in use.Keith Packard
The interrupt enable register cannot be used to temporarily disable interrupts, instead use the interrupt mask register. Note that this change means that a pile of buffers will be left stuck on the chip as the final interrupts will not be recognized to come and drain things.
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-22[intel] Add debug code to verify the cached ring tail pointer.Keith Packard
Recording the tail pointer in a local variable improves performance, but if someone messes up and fails to reload at the right time, the driver will write commands to the wrong part of the ring and scramble execution badly. This change (available by setting I915_RING_VALIDATE to 1) checks to make sure the cached tail pointer matches the hardware tail pointer at each ring buffer addition, calling BUG_ON when that's not true.
2008-05-22[gem] Release GEM buffers from work task scheduled from IRQ.Eric Anholt
There are now 3 lists. Active is buffers currently in the ringbuffer. Flushing is not in the ringbuffer, but needs a flush before unbinding. Inactive is as before. This prevents object_free → unbind → wait_rendering → object_reference and a kernel oops about weird refcounting. This also avoids an synchronous extra flush and wait when freeing a buffer which had a write_domain set (such as a temporary rendered to and then from using the 2d engine). It will sit around on the flushing list until the appropriate flush gets emitted, or we need the GTT space for another operation.
2008-05-21[gem] Replace ring throttling hack with actual time measurement.Eric Anholt
2008-05-20[gem] Use a separate sequence number field from classic/ttmEric Anholt
This lets us get some qualities we desire, such as using the full 32-bit range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active sequence numbers to request structs, which will be used soon for throttling and interrupt-driven list cleanup.
2008-05-20[gem] Rename sequence numbers from "cookie" to "seqno"Eric Anholt
2008-05-20[gem] Clean up active/inactive list handling using helper functions.Eric Anholt
Additionally, a boolean active field is added to indicate which list an object is on, rather than smashing last_rendering_cookie to 0 to show inactive. This will help with flush-reduction later on, and makes the code clearer.
2008-05-15[gem] Hold dev->struct_mutex to protect structure data.Eric Anholt
2008-05-15[gem] Rename the GTT LRU lists to active (executing) and inactive (idle).Eric Anholt
2008-05-11[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.Keith Packard
pread and pwrite must update the memory domains to ensure consistency with the GPU. At some point, it should be possible to avoid clflush through this path, but that isn't working for me.
2008-05-09GEM: Separate the LRU into execution list and LRU list.Eric Anholt
Now, the LRU list has objects that are completely done rendering and ready to kick out, while the execution list has things with active rendering, which have associated cookies and reference counts on them.
2008-05-08[intel-gem] Move domains to relocation records. add set_domain ioctl.Keith Packard
Domain information is about buffer relationships, not buffer contents. That means a relocation contains the domain information as it knows how the source buffer references the target buffer. This also adds the set_domain ioctl so that user space can move buffers to the cpu domain.
2008-05-06[intel-GEM] ref count objects in gtt-lru.Keith Packard
If objects on the lru aren't ref counted, they'll get pulled from the gtt as soon as they are freed. This change does cause objects to get stuck in the gtt until they're forced out by new requests. The lru should get cleaned when the irq occurs.
2008-05-06GEM: Use irq-based fencing rather than syncing and evicting every exec.Eric Anholt
2008-05-05Dump last batch buffer when hardware lockup is detected.Keith Packard
2008-05-05Add i915_dispatch_gem_execbuffer (broken).Keith Packard
This function submits a gem-based execbuffer to the ring. It doesn't work yet.
2008-05-02Remove drm_driver argument to functions taking drm_gem_object.Keith Packard
Now that drm_gem_object has a drm_driver * in it, functions don't need both parameters.
2008-05-01Add pin/unpin object ioctls for gem.Eric Anholt
2008-05-01checkpoint: gtt binding written.Eric Anholt
2008-05-01checkpoint: rename to GEM and a few more i915 bits.Eric Anholt
2008-04-30Hacking towards hooking up execbuffer.Eric Anholt
2008-04-29i915: fix off by one in VGA save/restore of AR & CR regsJesse Barnes
Turns out it's important to save/restore AR14 in particular.
2008-04-22i915: gfx hw and i945gme fixes from upstreamDave Airlie
From Jesse and Zhenyu originally.
2008-04-20[I915] Handle tiled buffers in vblank taskletKeith Packard
The vblank tasklet update code must build 2D blt commands with the appropriate tiled flags.
2008-04-11Save and restore dsparb and d_state regsKeith Packard
2008-03-12Merge branch 'intel-post-reloc'Thomas Hellstrom
Conflicts: linux-core/drm_compat.c linux-core/drm_compat.h linux-core/drm_ttm.c shared-core/i915_dma.c Bump driver minor to 13 due to introduction of new relocation type.
2008-03-12Avoid large kmallocs.Thomas Hellstrom
2008-03-08Switch from PIPE_VBLANK to PIPE_EVENT interrupts.Keith Packard
My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt. Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT registers to use START_VBLANK on 965 and VBLANK on previous chips.
2008-02-29More post-ioctl work.Thomas Hellstrom
2008-02-16[915]: more registers for S3 (DSPCLK_GATE_D, CACHE_MODE_0, MI_ARB_STATE)Keith Packard
Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on the VGA output on my HP 2510p after resume.
2008-02-13i915: Add a dri2 init path that gets the lock from the dri2 sarea.Kristian Høgsberg
2008-02-07Fix saveGR array sizeJesse Barnes
Make sure we have enough room for all the GR registers or we'll end up clobbering the AR index register (which should actually be harmless unless the BIOS is making an assumption about it).
2008-02-07i915: save/restore interrupt stateJesse Barnes
On resume, if the interrupt state isn't restored correctly, we may end up with a flood of unexpected or ill-timed interrupts, which could cause the kernel to disable the interrupt or vblank events to happen at the wrong time. So save/restore them properly.
2008-02-05i915: Re-report breadcrumbs on poll to the fence manager,Thomas Hellstrom
since a breadcrumb may actually turn up before a corresponding fence object has been placed on the fence ring.
2008-01-30Simplify the fencing code and differentiate between flushes andThomas Hellstrom
waiting types. Add a "command_stream_barrier" method to the bo driver.
2008-01-24Remove broken 'in vblank' accountingJesse Barnes
We need to return an accurate vblank count to the callers of ->get_vblank_counter, and in the Intel case the actual frame count register isn't udpated until the next active line is displayed, so we need to return one more than the frame count register if we're currently in a vblank period. However, none of the various ways of doing this is working yet, so disable the logic for now. This may result in a few missed events, but should fix the hangs some people have seen due to the current code tripping the wraparound logic in drm_update_vblank_count.
2008-01-23Fix IS_I915G macroJesse Barnes
One to many parantheses...
2008-01-23drm/i915: add support for E7221Dave Airlie
2008-01-22Correct vblank count valueJesse Barnes
The frame count registers don't increment until the start of the next frame, so make sure we return an incremented count if called during the actual vblank period.
2008-01-22Merge branch 'master' into vblank-rework, including mach64 supportJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_irq.c shared-core/radeon_irq.c shared-core/via_irq.c Mostly trivial conflicts. mach64 support from Mathieu Bérard.
2008-01-15i915: Add chipset id for Intel Integrated Graphics DeviceZhenyu Wang
This adds new chipset id in drm. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>