| Age | Commit message (Collapse) | Author |
|---|
|
This flag indicates that the driver is responsible for the map.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM
code paths
|
|
This header file is shared across linux and bsd, but is not installed
for user space to access. It's the place to put prototypes and data
types that aren't platform or chipset specific, but still internal to
the drm.
|
|
This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed.
Err.. didn't mean for that to slip in :)
|
|
|
|
|
|
|
|
Fix from the X driver. Make sure the PLLs are enabled and not in VGA mode
before writing PIPE(A|B)CONF regs to avoid hangs or crashes.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
The size passing to memset is wrong.
Signed-off-by: Li Zefan <lizf@cn.fujitsu.com>
|
|
Kernel "cleanfile" script run.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
radeon code.
|
|
|
|
|
|
|
|
|
