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See attachment 10246 on https://bugs.freedesktop.org/show_bug.cgi?id=5921
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Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC
entry size.
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- use a timer for disabling vblank events to avoid enable/disable calls too
often
- make i915 work with pre-965 chips again (would like to structure this
better, but this hack works on my test system)
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Sync-to-vblank actually works again for me with radeon.
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Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a
compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was
to handle the fact that on i386, alignof(uint64_t)==4.
Unfortunately, this handler was installed for _all_ 64-bit
architectures, instead of only x86_64 and ia64. And thus it breaks
32-bit compatibility on every other arch, where 64-bit integers are
aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode.
Arnd has a cunning plan to use 'compat_u64' with appropriate alignment
attributes according to the 32-bit ABI, but for now let's just make the
compat_radeon_cp_setparam routine entirely disappear on 64-bit machines
whose 32-bit compat support isn't for i386. It would be a no-op with
compat_u64 anyway.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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If the driver doesn't support vertical blank interrupts, it won't call
drm_vblank_init(), and dev->num_crtcs will be 0.
Also fix an off-by-one test against dev->num_crtcs.
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Reported by Steve Wilkins / Michel Dänzer.
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Also use drm_calloc instead of drm_alloc and memset, and use the size of the
struct instead of the size of the pointer for allocation...
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- use correct refcount variable in get/put routines
- extract counter update from drm_vblank_get
- make signal handling callback per-crtc
- update interrupt handling logic, drivers should use drm_handle_vblank
- move wakeup and counter update logic to new drm_handle_vblank routine
- fixup usage of get/put in light of counter update extraction
- fix longstanding bug in signal code, update pending counter only
*after* we're sure we'll setup signal handling
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- move pre/post modeset ioctl to core
- fixup i915 buffer swap
- fix outstanding signal count code
- create new core vblank init routine
- test (works with glxgears)
- simplify i915 interrupt handler
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of vblank interrupt in order to save power.
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Introduce tile members for future tiled buffer support.
Allow user-space to explicitly define a fence-class.
Remove the implicit fence-class mechanism.
64-bit wide buffer object flag member.
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on the CPU.... with this my indirect buffers at least start to live..
(cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122)
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ttm test runs with it at least, needs to do more testing on it
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Conflicts:
shared-core/radeon_drv.h
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This reverts commit 6e860d08d0f5b1e9a2d711aaf9fd6b982aa8039e.
As I said not a good plan - this macro will have to stay for now,
trying to do the vbl code with the inline was a bit messy - may need specialised
drm wait on functions
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This add support for CRTC2 vblank on radeon similiar to the i915 support
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This cleans this code up a lot and uses the generic Linux idr which is
designed for this.
Signed-off-by: Dave Airlie <airlied@linux.ie>
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Signed-off-by: Michel Dänzer <michel@tungstengraphics.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
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This reverts commit 3fdef0dc2000308b16907b95f637c60acde80a74.
ditto not on master yet
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This reverts commit 3dfc1400e9fc58c69292d7cf7c2e1653fa5e6991.
this shouldn't have gone on master yet
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