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2008-08-06Switch from shmem_getpage to read_mapping_pageKeith Packard
2008-08-05[gem-intel] Retiring flush requests should clear flushed write_domainsKeith Packard
When i915_gem_retire_request has a flush which matches an object write domain, clear the write domain. This will move the object to the inactive list rather than the flushing list, avoiding trouble with objects left stuck on the flushing list.
2008-08-05[gem-intel] Don't clear write_domain until flush completesKeith Packard
In i915_gem_object_wait_rendering, if the object write domain is being written by the GPU, the appropriate flushing commands are written to the device and an additional request queued to mark that flush. Finally, the function blocks on that new request. The bug was that the write_domain in the object was cleared before the function blocked. If the wait is interrupted by a signal, the flushing commands may still be pending. With the current write_domain information lost, the restarted syscall will drop right through the write_domain test as that value was lost, and so the function will not block at all. Oops. Fixed by simply moving the write_domain clear until after the wait_request succeeds. Note that the restarted system call will generate an additional flush sequence and request, but that should be 'harmless', aside from a slight performance impact. Someday we'll track flushing more accurately and clear write_domains more efficiently, but for now, this should suffice. This bug was discovered in the 2d gem development by running x11perf -copypixwin500 and noticing that the window got cleared accidentally.
2008-07-30intel-gem: Remove dead field from reverted changes.Eric Anholt
2008-07-30Revert "Rename drm_mm.c and its fuctions to drm_memrange."Eric Anholt
This reverts commit 3ad8db2071d30c198403e605f2726fc5c3e46bfd. We ended up not needing that namespace, and I'd rather not have the churn for producing diffs.
2008-07-29intel-gem: actually add i915_gem_debug.c.Eric Anholt
2008-07-29intel-gem: Check return value of pci_read_base.Eric Anholt
2008-07-28intel-gem: checkpatch.pl on drm_proc.c new contents.Eric Anholt
2008-07-28Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-07-28intel-gem: Another checkpatch.pl pass.Eric Anholt
2008-07-28intel-gem: Fix regression tests.Eric Anholt
Main fix is an oops that was triggered by the gtt pwrite path when we don't have the gtt initialized. Also, settle on -EBADF for "bad object handle", and -EINVAL for "reading/writing beyond object boundary".
2008-07-28intel-gem: Speed up tiled readpixels by tracking which pages have been flushed.Eric Anholt
This is around 3x or so speedup, since we would read wide rows at a time, and clflush each tile 8 times as a result. We'll want code related to this anyway when we do fault-based per-page clflushing for sw fallbacks.
2008-07-26intel-gem: Move debug-only functions to a separate file.Eric Anholt
2008-07-26radeon: Add suspend/resume hooks for saving/clearing/restoring interrupts.Stefan Becker
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=16799 .
2008-07-25drm: don't set the signal blocker on the master process.Dave Airlie
this lets us debug the X server through xkb startup. Not sure what the correct answer is, probably X needs to drop the lock when execing stuff, with input hotplug it can get xkb stuff at any time I believe.
2008-07-23intel-gem: Fix pread math and logic errors.Eric Anholt
Fixes an oops in fbotexture from walking off the end of the page list.
2008-07-23intel-gem: Add a quick hack to reduce clflushing on pread.Eric Anholt
This increases overhead for the large-readpixels case due to the repeated page cache accessing, but greatly reduces overhead for the small-readpixels case.
2008-07-23intel-gem: Don't do the GTT-pwrite shortcut on tiled buffers.Eric Anholt
These will be covered by the fence, while pread/pwrite are supposed to be CPU-perspective writes, with manual detiling done by the client.
2008-07-23intel-gem: Move /proc debugging to a separate file.Eric Anholt
2008-07-21intel-gem: Remove recently added pci_read_base prototype.Eric Anholt
This is in pci.h in the fixed patch to the kernel.
2008-07-21intel-gem: Set up HWS when it needs a vaddr during GEM init.Eric Anholt
This requires an updated 2D driver to not try to set it up as well.
2008-07-21Reinstate dev->vblank_enabled[].Michel Dänzer
I incorrectly thought it was obsolete.
2008-07-21Drop workaround for driver vblank counter going backwards.Michel Dänzer
The driver code that caused this is no longer necessary and has been dropped.
2008-07-21vblank-rework rework cleanups.Michel Dänzer
Remove some dead/obsolete code and make drm_update_vblank_count() static.
2008-07-21Remove obsolete dev->vblank_suspend[crtc] tests.Michel Dänzer
Caused drm_update_vblank_count() not to do its thing when called from drm_modeset_ctl() -> drm_vblank_get(). The vblank functionality no longer needs to be suspended during a modeset, so rename the field to vblank_inmodeset.
2008-07-19Update vblank code to new APIJesse Barnes
In my last push I forgot to convert users of drm_update_vblank_count over to drm_vblank_get/put, since that's where any interrupt off->on update accounting is done now. Since the modeset ioctl did something similar (an open coded update of the counter) convert it over to using get/put too, which saves us from having to deal with every combination of interrupt off & on between calls.
2008-07-18drm-gem: Fix buildIan Romanick
On some distros missing prototypes cause kernel builds to fail. These are hack to make the code build.
2008-07-18intel-gem: Leave 8xx tiling on until we find any issues.Eric Anholt
2008-07-17Avoid incorrect vblank wakeupsJesse Barnes
The current code uses the hw vblank counter exclusively, which can lead to wakeups during the active period rather than during the vblank period if the hw counter counts displayed frames rather than vblank periods. This change coverts the code over to using the counter while interrupts are enabled, fixing that issue. It also includes a couple of related changes: one to not enable the new enable/disable behavior until the modeset ioctl is called (to preserve old client behavior) and another to account for lost events due to mode setting with the new counter scheme. BSD will require similar changes to its drm_irq.c code, but they should be straightforward.
2008-07-15This is a modified version of Hong's patch from last month, with a fewHong Liu
modifications to make it work correctly on my test hardware (altered the backlight write function, made it enable the legacy backlight controller interrupts on mobile hardware, sorted the interrupt function so we don't get an excessive number of vblank interrupts). This lets the backlight keys on my T61 work properly, though there's a 750msec or so delay between the request and the brightness actually changing - this sounds awfully like the hardware spinning waiting for a status flag to become ready, but as far as I can tell they're all set correctly. If anyone can figure out what's wrong here, it'd be nice to know. Some of the functions are still stubs and just tell the hardware that the request was successful. These can be filled in as kernel modesetting gets integrated. I think it's worth getting this in anyway, since it's required for backlight control to work properly on some new platforms. Signed-off-by: Matthew Garrett <mjg@redhat.com>
2008-07-15drm: fix missing symbol exportDave Airlie
2008-07-15drm: add fix for PAT on radeon with 2.6.26Dave Airlie
2008-07-15drm/pcigart: fix warningDave Airlie
2008-07-14intel-gem: Disable tiling if we get junk from the MCHBAR read.Eric Anholt
One of our systems has been returning 0xffffffff from all MCHBAR reads, which means we'll need to figure out why, or add an alternate detection method.
2008-07-11intel-gem: Add two new ioctls for managing tiling on objects.Eric Anholt
Various chips have exciting interactions between the CPU and the GPU's different ways of accessing interleaved memory, so we need some kernel assistance in determining how it works. Only fully tested on GM965 so far.
2008-07-08xgi: use true/false instead of TRUE/FALSEmartin capitanio
2008-07-07[intel-gem] typo fix in DRM_ERROREric Anholt
2008-07-01Revert "i915: only use tiled blits on 965+"Jesse Barnes
This reverts commit 727d4f1d1667e43b3558bd5f6ed6dc2cd9c29401, somehow git deleted the symlink and replaced it with the file.
2008-07-01i915: only use tiled blits on 965+Jesse Barnes
When scheduled swaps occur, we need to blit between front & back buffers. If the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, but only on 965 chips, since it will cause corruption on pre-965 (e.g. 945). Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01i915: enable bus mastering on i915 at resume timeJie Luo
On 9xx chips, bus mastering needs to be enabled at resume time for much of the chip to function. With this patch, vblank interrupts will work as expected on resume, along with other chip functions. Fixes kernel bugzilla #10844. Signed-off-by: Jie Luo <clotho67@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-06-24i915: remove unused variableJesse Barnes
Leftover dev_priv from the move of the suspend/resume code into shared-core.
2008-06-24i915: register definition & header file cleanupJesse Barnes
It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file.
2008-06-24[intel-gem] Include drm_compat.h to get kmap_atomic_prot_pfnKeith Packard
2008-06-24drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-24[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-24[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-22agp: use true/false instead of TRUE/FALSEDave Airlie
2008-06-21[intel-gem] Add /proc/dri/*/i915_gem_interruptKeith Packard
This tracks most of the interrupt-related status, including the interrupt registers in the chip and the sequence number variables.
2008-06-21[intel-gem] Remove unused variable.Keith Packard
2008-06-20[intel-gem] Use polling in i915_gem_idle instead of interrupts.Keith Packard
While waiting for the hardware to idle on leavevt or lastclose, poll for the sync sequence number instead of waiting for an interrupt. This allows the code to bail if the hardware hangs for some reason. Also, this avoids issues with signals as the exisiting wait function is interruptible.