index : renesas/drm.git	android live master
	libdrm, cloned from git://anongit.freedesktop.org/mesa/drm	Laurent Pinchart

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log msg author committer range

path: root/linux-core

Age	Commit message (Expand)	Author
2008-02-07	Fix vblank enable/disable callbacks	Jesse Barnes
2008-02-05	i915: Re-report breadcrumbs on poll to the fence manager,	Thomas Hellstrom
2008-01-31	Add an fence_class_manager::last_queued_sequence member, since a	Thomas Hellstrom
2008-01-30	Simplify the fencing code and differentiate between flushes and	Thomas Hellstrom
2008-01-28	Fix hibernate save/restore of VGA attribute regs	Jesse Barnes
2008-01-24	Fixup modeset ioctl number & typedef usage	Jesse Barnes
2008-01-23	i915/flush: get the ret the right way around	Dave Airlie
2008-01-22	Merge branch 'master' into vblank-rework, including mach64 support	Jesse Barnes
2008-01-17	i915: fix invalid opcode exception on cpus without clflush	Kyle McMartin
2008-01-15	i915: Add chipset id for Intel Integrated Graphics Device	Zhenyu Wang
2008-01-15	Define i915_compat.c upper_32_bits for kernels < 2.6.21	Thomas Hellstrom
2008-01-15	this is to fix a deadloop in drm hang system issue.	Zou Nan hai
2008-01-14	fixup i915 compat resource allocation	Dave Airlie
2008-01-07	nv50: use dummy page in gart tables	Ben Skeggs
2008-01-05	drm: One forgotten rename of 'mask' to 'proposed_flags'.	Pekka Paalanen
2008-01-03	drm: cleanup DRM_DEBUG() parameters	Márton Németh
2007-12-26	i915: return fence argument from i915_execbuffer ioctl32 routine	Xiang, Haihao
2007-12-25	i915: i915_execbuffer ioctl32 routine, fix #13732	Xiang, Haihao
2007-12-21	Change drm_bo_type_dc to drm_bo_type_device and comment usage of this value.	Keith Packard
2007-12-21	Rename inappropriately named 'mask' fields to 'proposed_flags' instead.	Keith Packard
2007-12-21	Use dummy_read_page for unpopulated kernel-allocated ttm pages.	Keith Packard
2007-12-21	Move dummy_read_page from drm_ttm_set_user to drm_ttm_create.	Keith Packard
2007-12-21	Clean up and document drm_ttm.c APIs. drm_bind_ttm -> drm_ttm_bind.	Keith Packard
2007-12-15	Document drm_ttm_set_user.	Keith Packard
2007-12-15	Document drm_buffer_object_validate function.	Keith Packard
2007-12-15	Document fence_class mess in drm_bo_setstatus_ioctl	Keith Packard
2007-12-15	Document drm_bo_handle_validate. Match drm_bo_do_validate parameter order.	Keith Packard
2007-12-15	Document drm_bo_do_validate. Remove spurious 'do_wait' parameter.	Keith Packard
2007-12-15	Make ttm create/destroy APIs consistent. Pass page_flags in create.	Keith Packard
2007-12-13	catch an out of memory condition	Alan Hourihane
2007-12-10	drm: move agp include outside CONFIG_AGP as it isn't dependant on agp in kernel	Dave Airlie
2007-12-06	take down stuff after asking driver to unload	Dave Airlie
2007-12-05	patch from -mm kernel to use upper_32_bits	Dave Airlie
2007-12-01	drm: Add _DRM_DRIVER map flag.	Robert Noland
2007-11-29	drm: enable udev node creation	Dave Airlie
2007-11-29	drm: oops not a cleanup..	Dave Airlie
2007-11-29	drm: more cleanups	Dave Airlie
2007-11-22	drm: major whitespace/coding style realignment with kernel	Dave Airlie
2007-11-22	drm: cleanup drm_regman.c coding style	Dave Airlie
2007-11-21	drm: don't reset to 0 irq_enabled when client open file descriptor	Jerome Glisse
2007-11-19	drm: fix dead lock in drm_buffer_object_transfer	Jerome Glisse
2007-11-15	nouveau: rename	Jeremy Kolb
2007-11-15	nouveau: flip buffer into gart.	Jeremy Kolb
2007-11-15	mm fixups.	Thomas Hellstrom
2007-11-15	i915: remove excess debug output	Dave Airlie
2007-11-15	intel: add flushing for i8xx chipsets.	Dave Airlie
2007-11-14	Add new shared header file drm_internal.h.	Kristian Høgsberg
2007-11-14	Revert "nouveau: stub superioctl"	Ben Skeggs
2007-11-14	Merge branch 'fifo-cleanup' into upstream-master	Ben Skeggs
2007-11-14	nouveau: store user control reg offsets in channel struct	Ben Skeggs

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generated by cgit v1.2.3 (git 2.25.1) at 2025-10-28 05:27:48 +0000

/* mga_dma.c -- DMA support for mga g200/g400 -*- linux-c -*-
 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
 */
/* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

/**
 * \file mga_dma.c
 * DMA support for MGA G200 / G400.
 *
 * \author Rickard E. (Rik) Faith <faith@valinux.com>
 * \author Jeff Hartmann <jhartmann@valinux.com>
 * \author Keith Whitwell <keith@tungstengraphics.com>
 * \author Gareth Hughes <gareth@valinux.com>
 */

#include "drmP.h"
#include "drm.h"
#include "drm_sarea.h"
#include "mga_drm.h"
#include "mga_drv.h"

#define MGA_DEFAULT_USEC_TIMEOUT	10000
#define MGA_FREELIST_DEBUG		0

#define MINIMAL_CLEANUP    0
#define FULL_CLEANUP       1
static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);

/* ================================================================
 * Engine control
 */

int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
{
	u32 status = 0;
	int i;
	DRM_DEBUG("\n");

	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS) {
			MGA_WRITE8(MGA_CRTC_INDEX, 0);
			return 0;
		}
		DRM_UDELAY(1);
	}

#if MGA_DMA_DEBUG
	DRM_ERROR("failed!\n");
	DRM_INFO("   status=0x%08x\n", status);
#endif
	return -EBUSY;
}

static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
{
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;

	DRM_DEBUG("\n");

	/* The primary DMA stream should look like new right about now.
	 */
	primary->tail = 0;
	primary->space = primary->size;
	primary->last_flush = 0;

	sarea_priv->last_wrap = 0;

	/* FIXME: Reset counters, buffer ages etc...
	 */

	/* FIXME: What else do we need to reinitialize?  WARP stuff?
	 */

	return 0;
}

/* ================================================================
 * Primary DMA stream
 */

void mga_do_dma_flush(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	u32 status = 0;
	int i;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	/* We need to wait so that we can do an safe flush */
	for (i = 0; i < dev_priv->usec_timeout; i++) {
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
		if (status == MGA_ENDPRDMASTS)
			break;
		DRM_UDELAY(1);
	}

	if (primary->tail == primary->last_flush) {
		DRM_DEBUG("   bailing out...\n");
		return;
	}

	tail = primary->tail + dev_priv->primary->offset;

	/* We need to pad the stream between flushes, as the card
	 * actually (partially?) reads the first of these commands.
	 * See page 4-16 in the G400 manual, middle of the page or so.
	 */
	BEGIN_DMA(1);

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	primary->last_flush = primary->tail;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head <= tail) {
		primary->space = primary->size - primary->tail;
	} else {
		primary->space = head - tail;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06lx\n", tail - dev_priv->primary->offset);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	u32 head, tail;
	DMA_LOCALS;
	DRM_DEBUG("\n");

	BEGIN_DMA_WRAP();

	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000,
		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);

	ADVANCE_DMA();

	tail = primary->tail + dev_priv->primary->offset;

	primary->tail = 0;
	primary->last_flush = 0;
	primary->last_wrap++;

	head = MGA_READ(MGA_PRIMADDRESS);

	if (head == dev_priv->primary->offset) {
		primary->space = primary->size;
	} else {
		primary->space = head - dev_priv->primary->offset;
	}

	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
	DRM_DEBUG("   tail = 0x%06x\n", primary->tail);
	DRM_DEBUG("   wrap = %d\n", primary->last_wrap);
	DRM_DEBUG("  space = 0x%06x\n", primary->space);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMEND, tail | dev_priv->dma_access);

	set_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
{
	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
	u32 head = dev_priv->primary->offset;
	DRM_DEBUG("\n");

	sarea_priv->last_wrap++;
	DRM_DEBUG("   wrap = %d\n", sarea_priv->last_wrap);

	mga_flush_write_combine();
	MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL);

	clear_bit(0, &primary->wrapped);
	DRM_DEBUG("done.\n");
}

/* ================================================================
 * Freelist management
 */

#define MGA_BUFFER_USED		~0
#define MGA_BUFFER_FREE		0

#if MGA_FREELIST_DEBUG
static void mga_freelist_print(struct drm_device * dev)
{
	drm_mga_private_t *dev_priv = dev->dev_private;
	drm_mga_freelist_t *entry;

	DRM_INFO("\n");
	DRM_INFO("current dispatch: last=0x%x done=0x%x\n",
		 dev_priv->sarea_priv->last_dispatch,
		 (unsigned int)(MGA_READ(MGA_PRIMADDRESS) -
				dev_priv->primary->offset));
	DRM_INFO("current freelist:\n");

	for (entry = dev_priv->head->next; entry; entry = entry->next) {
		DRM_INFO("   %p   idx=%2d  age=0x%x 0x%06lx\n",
			 entry, entry->buf->idx, entry->age.head,
			 entry->age.head - dev_priv->primary->offset);
	}
	DRM_INFO("\n");
}
#endif

static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv)
{
	struct drm_device_dma *dma = dev->dma;
	struct drm_buf *buf;
	drm_mga_buf_priv_t *buf_priv;
	drm_mga_freelist_t *entry;
	int i;
	DRM_DEBUG("count=%d\n", dma->buf_count);

	dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
	if (dev_priv->head == NULL)
		return -ENOMEM;

	memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
	SET_AGE(&dev_priv->head->age, MGA_BUFFER_USED, 0);

	for (i = 0; i < dma->buf_count; i++) {
		buf = dma->buflist[i];
		buf_priv = buf->dev_private;

		entry = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
		if (entry == NULL)
			return -ENOMEM;

		memset(entry, 0, sizeof(drm_mga_freelist_t));

		entry->next = dev_priv->head->next;
		entry->prev = dev_priv->head;
		SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
		entry->buf = buf;

		if (dev_priv->head->next != NULL)
			dev_priv->head->next->prev = entry;
		if (entry->next == NULL)
			dev_priv->tail = entry;

		buf_priv->list_entry = entry;
		buf_priv->discard = 0;
		buf_priv->dispatched = 0;

		dev_priv->head->next = entry;
	}

	return 0;
}