summaryrefslogtreecommitdiff
path: root/linux-core
AgeCommit message (Expand)Author
2007-11-05remove duplicate and obsolete ioctl statementsAlan Hourihane
2007-11-05add missing lockAlan Hourihane
2007-11-05Use _sizeAlan Hourihane
2007-11-05drm: more kernel coding style cleanupsDave Airlie
2007-11-05drm/ttm: apply linux kernel coding style to bo_lock/move/object/ttm.cDave Airlie
2007-11-05drm/ttm: kernel coding style for bo.c and objects.hDave Airlie
2007-11-05drm: fix the the typoDave Airlie
2007-11-05drm: fix memset size errorLi Zefan
2007-11-05drm: remove lots of spurious whitespace.Dave Airlie
2007-11-05drm: move some of the OS stuff into the OS headerDave Airlie
2007-11-05nouveau: Use a sw method instead of notify interrupt to signal fence completion.Ben Skeggs
2007-11-05nouveau: disable m2mf buffer move for the momentBen Skeggs
2007-11-05nouveau: cleanupsBen Skeggs
2007-11-05nouveau: vram is bar1Ben Skeggs
2007-11-05nouveau: hook up an inital fence irq handlerBen Skeggs
2007-11-04drm: fix oops since user objects..Dave Airlie
2007-11-02nouveau: add darktama's email address to authors section.Jeremy Kolb
2007-11-02nouveau: put it all together.Jeremy Kolb
2007-11-02nouveau: Add darktama's fencing code. Restructure some stuff.Jeremy Kolb
2007-11-02nouveau: incorporate darktama's buffer object work.Jeremy Kolb
2007-11-02nouveau: more filling in for ttm. Change copyright since it's based off of r...Jeremy Kolb
2007-11-02Merge branch 'master' into modesetting-101Thomas Hellstrom
2007-11-02User buffer support.Thomas Hellstrom
2007-11-01Merge branch 'master' into modesetting-101Jesse Barnes
2007-11-01Cleanup vblank_init and fix drm_irq_installJesse Barnes
2007-10-31nouveau: add missing file.Jeremy Kolb
2007-10-31Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drmJeremy Kolb
2007-10-31nouveau: ttm stubsJeremy Kolb
2007-11-01drm/ttm: add support for cached un-snooped mappings.Dave Airlie
2007-11-01i915: fix compat code on 965/g33Dave Airlie
2007-10-31drm: add chipset flushing via agp supportDave Airlie
2007-10-31i915: add backwards compat chipset flushing codeDave Airlie
2007-10-31drm: call driver load after initing agp subsystemDave Airlie
2007-10-30Merge branch 'master' into vblank-rework, fixup remaining driversJesse Barnes
2007-10-30drm/i915: add driver cache flush entry pointDave Airlie
2007-10-29Move struct drm_drawable_info out of public header file.Kristian Høgsberg
2007-10-28Merge branch 'radeon-ttm' of git://people.freedesktop.org/~airlied/drm into m...Jerome Glisse
2007-10-26i915: suspend/resume supportJesse Barnes
2007-10-26update DRM sysfs supportJesse Barnes
2007-10-26Buffer flags and masks are 64-bit.Thomas Hellstrom
2007-10-26Buffer flags and masks are 64-bit.Thomas Hellstrom
2007-10-25Initial pass at porting MGA to vblank-reworkIan Romanick
2007-10-25Merge branch 'master' into modesetting-101Thomas Hellstrom
2007-10-25Tighten permissions on some buffer manager ioctls.Thomas Hellstrom
2007-10-25Buffer manager:Thomas Hellstrom
2007-10-25Fix buffer object flag / mask checking.Thomas Hellstrom
2007-10-25Merge branch 'master' into drm-ttm-finalizeThomas Hellstrom
2007-10-25missing mutex unlock bugRoel Kluin
2007-10-23Need fb attachedAlan Hourihane
2007-10-22Remove duplicate file.Thomas Hellstrom
; ((read_domains << 16) == bo->space_accounted)) { sc->new_accounted = bo->space_accounted; return 0; } if (bo->space_accounted == 0) { if (write_domain == RADEON_GEM_DOMAIN_VRAM) sizes->op_vram_write += bo->size; else if (write_domain == RADEON_GEM_DOMAIN_GTT) sizes->op_gart_write += bo->size; else sizes->op_read += bo->size; sc->new_accounted = (read_domains << 16) | write_domain; } else { uint16_t old_read, old_write; old_read = bo->space_accounted >> 16; old_write = bo->space_accounted & 0xffff; if (write_domain && (old_read & write_domain)) { sc->new_accounted = write_domain; /* moving from read to a write domain */ if (write_domain == RADEON_GEM_DOMAIN_VRAM) { sizes->op_read -= bo->size; sizes->op_vram_write += bo->size; } else if (write_domain == RADEON_GEM_DOMAIN_GTT) { sizes->op_read -= bo->size; sizes->op_gart_write += bo->size; } } else if (read_domains & old_write) { sc->new_accounted = bo->space_accounted & 0xffff; } else { /* rewrite the domains */ if (write_domain != old_write) fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); if (read_domains != old_read) fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); return RADEON_CS_SPACE_FLUSH; } } return 0; } static int radeon_cs_do_space_check(struct radeon_cs *cs, struct radeon_cs_space_check *new_tmp) { struct radeon_cs_manager *csm = cs->csm; int i; struct radeon_bo *bo; struct rad_sizes sizes; int ret; /* check the totals for this operation */ if (cs->bo_count == 0 && !new_tmp) return 0; memset(&sizes, 0, sizeof(struct rad_sizes)); /* prepare */ for (i = 0; i < cs->bo_count; i++) { ret = radeon_cs_setup_bo(&cs->bos[i], &sizes); if (ret) return ret; } if (new_tmp) { ret = radeon_cs_setup_bo(new_tmp, &sizes); if (ret) return ret; } if (sizes.op_read < 0) sizes.op_read = 0; /* check sizes - operation first */ if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) || (sizes.op_vram_write > csm->vram_limit)) { return RADEON_CS_SPACE_OP_TO_BIG; } if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) || ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) { return RADEON_CS_SPACE_FLUSH; } csm->gart_write_used += sizes.op_gart_write; csm->vram_write_used += sizes.op_vram_write; csm->read_used += sizes.op_read; /* commit */ for (i = 0; i < cs->bo_count; i++) { bo = cs->bos[i].bo; bo->space_accounted = cs->bos[i].new_accounted; } if (new_tmp) new_tmp->bo->space_accounted = new_tmp->new_accounted; return RADEON_CS_SPACE_OK; } void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) { int i; for (i = 0; i < cs->bo_count; i++) { if (cs->bos[i].bo == bo && cs->bos[i].read_domains == read_domains && cs->bos[i].write_domain == write_domain) return; } radeon_bo_ref(bo); i = cs->bo_count; cs->bos[i].bo = bo; cs->bos[i].read_domains = read_domains; cs->bos[i].write_domain = write_domain; cs->bos[i].new_accounted = 0; cs->bo_count++; assert(cs->bo_count < MAX_SPACE_BOS); } static int radeon_cs_check_space_internal(struct radeon_cs *cs, struct radeon_cs_space_check *tmp_bo) { int ret; int flushed = 0; again: ret = radeon_cs_do_space_check(cs, tmp_bo); if (ret == RADEON_CS_SPACE_OP_TO_BIG) return -1; if (ret == RADEON_CS_SPACE_FLUSH) { (*cs->space_flush_fn)(cs->space_flush_data); if (flushed) return -1; flushed = 1; goto again; } return 0; } int radeon_cs_space_check_with_bo(struct radeon_cs *cs, struct radeon_bo *bo, uint32_t read_domains, uint32_t write_domain) { struct radeon_cs_space_check temp_bo; int ret = 0; if (bo) { temp_bo.bo = bo; temp_bo.read_domains = read_domains; temp_bo.write_domain = write_domain; temp_bo.new_accounted = 0; } ret = radeon_cs_check_space_internal(cs, bo ? &temp_bo : NULL); return ret; } int radeon_cs_space_check(struct radeon_cs *cs) { return radeon_cs_check_space_internal(cs, NULL); } void radeon_cs_space_reset_bos(struct radeon_cs *cs) { int i; for (i = 0; i < cs->bo_count; i++) { radeon_bo_unref(cs->bos[i].bo); cs->bos[i].bo = NULL; cs->bos[i].read_domains = 0; cs->bos[i].write_domain = 0; cs->bos[i].new_accounted = 0; } cs->bo_count = 0; }