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AgeCommit message (Expand)Author
2001-04-02Update radeon DRM to v1.1.0 (texture upload changes).Gareth Hughes
2001-03-30merge in 2.4.3 kernel change.Alan Hourihane
2001-03-21- Fix MGA header info.Gareth Hughes
2001-03-19Import of XFree86 4.0.99.1David Dawes
2001-03-19Update version, date stamp.Gareth Hughes
2001-03-19Remove PRIMPTR completely.Gareth Hughes
2001-03-18__REALLY_HAVE_MTRR, vmalloc_32 fixes from Jeff Wiedemeier.Gareth Hughes
2001-03-14Merged sarea-1-0-0Kevin E Martin
2001-03-08Fix ring space calculations, tests. Based on patch by Bruce Stockwell.Gareth Hughes
2001-03-07Change error message to debug message when client dies while holding theGareth Hughes
2001-03-07surround agp calls in drm_memory with __REALLY_HAVE_AGP instead ofAlan Hourihane
2001-03-06Merge tdfx-3-1-0 branch.Gareth Hughes
2001-03-05allow dristat to find out whether AGP is write-combined or not.Alan Hourihane
2001-03-05fix that last patch to initialize the MTRR when AGP available.Alan Hourihane
2001-03-04Don't try and setup the MTRR for AGP when AGP not available. CheckAlan Hourihane
2001-02-21Add Linux 2.2.x support for stubsRik Faith
2001-02-16- Clean up the way customization of the templates is done.Gareth Hughes
2001-02-15Added missing include "drm_lists.h".Keith Whitwell
2001-02-15- Fix up merge.Gareth Hughes
2001-02-15Merge mga-1-0-0-branch into trunk.Gareth Hughes
2001-01-29Corresponding sync with PCI GART updates.Gareth Hughes
2001-01-24- Misc cleanups.Gareth Hughes
2001-01-08Merged tdfx-3-0-0Nathan Hand
2001-01-05Merged ati-5-0-0Kevin E Martin
2001-01-04Sync with Linux 2.4.0-prereleaseRik Faith
2000-12-30add blit ioctl, fix plnwt handlingKeith Whitwell
2000-12-15Update date information.Gareth Hughes
2000-12-12- Fix nasty depth span bug. Drawable offset was not being added to pixelGareth Hughes
2000-12-02Merged ati-4-1-1-branch into trunk.Gareth Hughes
2000-11-15Sync with Linux 2.4.0-test11-pre5 Provide backward compatibility testedRik Faith
2000-11-08merge with 4.0.1dDavid Dawes
2000-09-29More changes for sync with Linux 2.4.0-test9-pre7Rik Faith
2000-09-29Audit calls to schedule() Remove tags from files shared with Linux kernelRik Faith
2000-09-28Fixed two things Rik pointed out in the last commitJeff Hartmann
2000-09-27Merged the mga-lock-debug-0-2-0-branch with the trunk. This includesJeff Hartmann
2000-09-24commit xfree86 4.0.1d-pre updateAlan Hourihane
2000-09-10Sync with 2.4.0-test8 kernel.Gareth Hughes
2000-09-07Merged tdfx-2-1-branchAlan Hourihane
2000-09-06Sync with 2.4.0-test8-pre5 kernel.Gareth Hughes
2000-08-31Bump version number after kernel interface change.Keith Whitwell
2000-08-28Add compatibility header file to make Linux 2.4.0 kernel patches cleaner.Rik Faith
2000-08-26Sync with Linux 2.4.0-test7 Add signal blocking support to all driversRik Faith
2000-08-25Remove misleading authorship information from sis driver (author has beenRik Faith
2000-08-18Fix ABA problem in drm_freelist_{put,try}Rik Faith
2000-08-18Sync with Linux 2.4.0-test7/pre4Rik Faith
2000-08-17Bug #112197 Made sis driver compile under 2.4.0-test7/pre4Rik Faith
2000-08-16Initial revisionDavid Dawes
2000-08-08Sync with Linux 2.4.0-test6-pre8Rik Faith
2000-08-07Fix for multiple sarea bug + agp built into kernel segfaultJeff Hartmann
2000-08-04Sync with Linux 2.4.0-test6-pre2Rik Faith
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-20 08:58:07 +0000
_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ #define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ #define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ #define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ #define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ #define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ #define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ #define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ #define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ #define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ #define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ #define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ #define I810_CTX_SETUP_SIZE 20 /* Texture state (per tex unit) */ #define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ #define I810_TEXREG_MI1 1 #define I810_TEXREG_MI2 2 #define I810_TEXREG_MI3 3 #define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ #define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ #define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ #define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ #define I810_TEX_SETUP_SIZE 8 /* Flags for clear ioctl */ #define I810_FRONT 0x1 #define I810_BACK 0x2 #define I810_DEPTH 0x4 typedef enum _drm_i810_init_func { I810_INIT_DMA = 0x01, I810_CLEANUP_DMA = 0x02, I810_INIT_DMA_1_4 = 0x03 } drm_i810_init_func_t; /* This is the init structure after v1.2 */ typedef struct _drm_i810_init { drm_i810_init_func_t func; unsigned int mmio_offset; unsigned int buffers_offset; int sarea_priv_offset; unsigned int ring_start; unsigned int ring_end; unsigned int ring_size; unsigned int front_offset; unsigned int back_offset; unsigned int depth_offset; unsigned int overlay_offset; unsigned int overlay_physical; unsigned int w; unsigned int h; unsigned int pitch; unsigned int pitch_bits; } drm_i810_init_t; /* Warning: If you change the SAREA structure you must change the Xserver * structure as well */ typedef struct _drm_i810_tex_region { unsigned char next, prev; /* indices to form a circular LRU */ unsigned char in_use; /* owned by a client, or free? */ int age; /* tracked by clients to update local LRU's */ } drm_i810_tex_region_t; typedef struct _drm_i810_sarea { unsigned int ContextState[I810_CTX_SETUP_SIZE]; unsigned int BufferState[I810_DEST_SETUP_SIZE]; unsigned int TexState[2][I810_TEX_SETUP_SIZE]; unsigned int dirty; unsigned int nbox; struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS]; /* Maintain an LRU of contiguous regions of texture space. If * you think you own a region of texture memory, and it has an * age different to the one you set, then you are mistaken and * it has been stolen by another client. If global texAge * hasn't changed, there is no need to walk the list. * * These regions can be used as a proxy for the fine-grained * texture information of other clients - by maintaining them * in the same lru which is used to age their own textures, * clients have an approximate lru for the whole of global * texture space, and can make informed decisions as to which * areas to kick out. There is no need to choose whether to * kick out your own texture or someone else's - simply eject * them all in LRU order. */ drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1]; /* Last elt is sentinal */ int texAge; /* last time texture was uploaded */ int last_enqueue; /* last time a buffer was enqueued */ int last_dispatch; /* age of the most recently dispatched buffer */ int last_quiescent; /* */ int ctxOwner; /* last context to upload state */ int vertex_prim; int pf_enabled; /* is pageflipping allowed? */ int pf_active; int pf_current_page; /* which buffer is being displayed? */ } drm_i810_sarea_t; /* WARNING: If you change any of these defines, make sure to change the * defines in the Xserver file (xf86drmMga.h) */ /* i810 specific ioctls * The device specific ioctl range is 0x40 to 0x79. */ #define DRM_I810_INIT 0x00 #define DRM_I810_VERTEX 0x01 #define DRM_I810_CLEAR 0x02 #define DRM_I810_FLUSH 0x03 #define DRM_I810_GETAGE 0x04 #define DRM_I810_GETBUF 0x05 #define DRM_I810_SWAP 0x06 #define DRM_I810_COPY 0x07 #define DRM_I810_DOCOPY 0x08 #define DRM_I810_OV0INFO 0x09 #define DRM_I810_FSTATUS 0x0a #define DRM_I810_OV0FLIP 0x0b #define DRM_I810_MC 0x0c #define DRM_I810_RSTATUS 0x0d #define DRM_I810_FLIP 0x0e #define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t) #define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t) #define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t) #define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH) #define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE) #define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t) #define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP) #define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t) #define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY) #define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t) #define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS) #define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP) #define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t) #define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS) #define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP) typedef struct _drm_i810_clear { int clear_color; int clear_depth; int flags; } drm_i810_clear_t; /* These may be placeholders if we have more cliprects than * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to * false, indicating that the buffer will be dispatched again with a * new set of cliprects. */ typedef struct _drm_i810_vertex { int idx; /* buffer index */ int used; /* nr bytes in use */ int discard; /* client is finished with the buffer? */ } drm_i810_vertex_t; typedef struct _drm_i810_copy_t { int idx; /* buffer index */ int used; /* nr bytes in use */ void *address; /* Address to copy from */ } drm_i810_copy_t; #define PR_TRIANGLES (0x0<<18) #define PR_TRISTRIP_0 (0x1<<18) #define PR_TRISTRIP_1 (0x2<<18) #define PR_TRIFAN (0x3<<18) #define PR_POLYGON (0x4<<18) #define PR_LINES (0x5<<18) #define PR_LINESTRIP (0x6<<18) #define PR_RECTS (0x7<<18) #define PR_MASK (0x7<<18) typedef struct drm_i810_dma { void *virtual; int request_idx; int request_size; int granted; } drm_i810_dma_t; typedef struct _drm_i810_overlay_t { unsigned int offset; /* Address of the Overlay Regs */ unsigned int physical; } drm_i810_overlay_t; typedef struct _drm_i810_mc { int idx; /* buffer index */ int used; /* nr bytes in use */ int num_blocks; /* number of GFXBlocks */ int *length; /* List of lengths for GFXBlocks (FUTURE) */ unsigned int last_render; /* Last Render Request */ } drm_i810_mc_t; #endif /* _I810_DRM_H_ */
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-20 08:58:07 +0000