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2008-05-29[intel-gem] Write the presumed_offset back out after updating it.Eric Anholt
Otherwise, 965 constant state buffers get re-relocated every exec. Ouch.
2008-05-28[intel-gem] Clean up active/inactive/flushing list debugging.Keith Packard
2008-05-27[intel-gem] Replace idlelock usage with real lock acquisition.Eric Anholt
2008-05-26[intel-gem] Must hold DRM lock while setting object domainKeith Packard
Object domain transfer can involve adding flush ops to the request queue, and so the DRM lock must be held to avoid having the X server smash pointers badly.
2008-05-26[i915] leave interrupts masked off when not in use.Keith Packard
The interrupt enable register cannot be used to temporarily disable interrupts, instead use the interrupt mask register. Note that this change means that a pile of buffers will be left stuck on the chip as the final interrupts will not be recognized to come and drain things.
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25[intel-gem] Compute npages instead of nbytes in flush_pwriteKeith Packard
i915_gem_flush_pwrite optimizes short writes to the buffer by clflushing only the modified pages, but it was miscomputing the number of pages.
2008-05-25[intel-gem] replace call to jiffies_to-msec with simple inlineKeith Packard
2008-05-22[intel-gem] Encourage multiple caches to hold read dataKeith Packard
When reading from multiple domains, allow each cache to continue to hold data until writes occur somewhere. This is done by first leaving the read_domains alone at bind time (presumably the CPU read cache contains valid data still) and then in set_domain, if no write_domain is specified, the new read domains are simply merged into the existing read domains. A huge comment was added above set_domain to explain how things are expected to work.
2008-05-22[gem] Use CPU domain for new or pageable objectsKeith Packard
Newly allocated objects need to be in the CPU domain as they've just been cleared by the CPU. Also, unmapping objects from the GTT needs to put them into the CPU domain, both to flush rendering as well as to ensure that any paging action gets flushed before we remap to the GTT.
2008-05-22[intel-gem] Force ring retire by emiting flush before user-interrupt.Keith Packard
Commands in the ring are parsed and started when the head pointer passes by them, but they are not necessarily finished until a MI_FLUSH happens. This patch inserts a flush after the execbuffer (the only place a flush wasn't already happening).
2008-05-22[intel-gem] invalidate ring locals for pin/unpin/set_domain/free functionsKeith Packard
Ring locals must be reloaded from hardware in case the X server ran.
2008-05-22[gem] Release GEM buffers from work task scheduled from IRQ.Eric Anholt
There are now 3 lists. Active is buffers currently in the ringbuffer. Flushing is not in the ringbuffer, but needs a flush before unbinding. Inactive is as before. This prevents object_free → unbind → wait_rendering → object_reference and a kernel oops about weird refcounting. This also avoids an synchronous extra flush and wait when freeing a buffer which had a write_domain set (such as a temporary rendered to and then from using the 2d engine). It will sit around on the flushing list until the appropriate flush gets emitted, or we need the GTT space for another operation.
2008-05-21[gem] Replace ring throttling hack with actual time measurement.Eric Anholt
2008-05-21[gem] Fix bad test for list_for_each completion.Eric Anholt
Since it's a circular list, the entry won't be NULL at termination.
2008-05-21[gem] Hold a reference on the object in i915_gem_wait_space.Eric Anholt
Otherwise, in the middle of the function called using it the last ref might disappear.
2008-05-21[intel-gem] invalidate ring locals for pin/unpin/set_domain/free functionsKeith Packard
Ring locals must be reloaded from hardware in case the X server ran.
2008-05-20[gem] Use a separate sequence number field from classic/ttmEric Anholt
This lets us get some qualities we desire, such as using the full 32-bit range (except zero), avoiding DRM_WAIT_ON, and a 1:1 mapping of active sequence numbers to request structs, which will be used soon for throttling and interrupt-driven list cleanup.
2008-05-20[gem] Rename sequence numbers from "cookie" to "seqno"Eric Anholt
2008-05-20[gem] Clean up active/inactive list handling using helper functions.Eric Anholt
Additionally, a boolean active field is added to indicate which list an object is on, rather than smashing last_rendering_cookie to 0 to show inactive. This will help with flush-reduction later on, and makes the code clearer.
2008-05-15[gem] Hold dev->struct_mutex to protect structure data.Eric Anholt
2008-05-15[gem] Rename the GTT LRU lists to active (executing) and inactive (idle).Eric Anholt
2008-05-15[gem] typo fix in comment.Eric Anholt
2008-05-12[GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen.Eric Anholt
2008-05-12[intel] Minor kludge -- wait for the ring to be nearly empty before queuingKeith Packard
No need to fill the ring that much; wait for it to become nearly empty before adding the execbuffer request. A better fix will involve scheduling ring insertion in the irq handler.
2008-05-12[gem] Set write domain to CPU when doing pwrite.Keith Packard
Leave the flush call in place, which can fix domains up if necessary.
2008-05-12[gem] Clarify use of explicit domain control. Remove Gen3 from I-cache usage.Keith Packard
2008-05-11[GEM] Make pread/pwrite manage memory domains. No luck with movnti though.Keith Packard
pread and pwrite must update the memory domains to ensure consistency with the GPU. At some point, it should be possible to avoid clflush through this path, but that isn't working for me.
2008-05-10[intel-GEM] exec list can contain pinned, lru cannot.Keith Packard
The exec list contains all objects, in order of use. The lru list contains only unpinned objects ready to be evicted. This required two changes -- the first was to not migrate pinned objects from exec to lru, the second was to search for the first unpinned object in the exec list when doing eviction.
2008-05-10Merge commit 'anholt/drm-gem' into drm-gemKeith Packard
2008-05-10[GEM] Add drm-gem.txtKeith Packard
Add some API and implementation documentation for GEM.
2008-05-10[intel-GEM] Clean up GEM ioctl naming.Keith Packard
Rename 'validate_entry' to 'exec_object', then clean up some field names in structures (renaming buffer_offset to just offset, for example).
2008-05-09GEM: Fix arguments to drm_memrange_init so we don't exceed our allocation.Eric Anholt
It takes (offset, size), not (offset, end).
2008-05-09GEM: Separate the LRU into execution list and LRU list.Eric Anholt
Now, the LRU list has objects that are completely done rendering and ready to kick out, while the execution list has things with active rendering, which have associated cookies and reference counts on them.
2008-05-09GEM: Clear obj_priv->agp_mem when we free it.Eric Anholt
Still managing to get something wrong with this, oopsing down in agp.
2008-05-09GEM: Avoid leaking refs on target objects on presumed offset success.Eric Anholt
2008-05-09[gem] API cleanup. allocate->create unreference->close name->flinkKeith Packard
Make the API names a bit more consistent.
2008-05-08[i915] clean up whinging from checkpatch.plKeith Packard
2008-05-08Clean up whinging from checkpatch.pl in drm_gem.cKeith Packard
Whitespace changes, a few too-long-lines and some extra braces.
2008-05-08GEM: Fix oops on NULL dereference when we try clflushing when we don't need to.Eric Anholt
2008-05-08[intel-gem] Move domains to relocation records. add set_domain ioctl.Keith Packard
Domain information is about buffer relationships, not buffer contents. That means a relocation contains the domain information as it knows how the source buffer references the target buffer. This also adds the set_domain ioctl so that user space can move buffers to the cpu domain.
2008-05-07Apply a few stylistic cleanups to match kernel code.Arjan van de Ven
2008-05-07GEM: Wait for existing rendering to complete before writing relocation data.Eric Anholt
This should already have been generally safe since we don't change contents and put in new relocations between execbufs, so if we were writing in a new relocation then we'd already waited rendering to complete when we moved the target of the relocation. However, doing the right thing will be required if we do buffer reuse.
2008-05-07GEM: Extend cache domain stuff for 965.Eric Anholt
One of our MI_FLUSH bits is reserved on 965, being always implied, and there's a vertex cache that was forgotten.
2008-05-06[intel-GEM] ref count objects in gtt-lru.Keith Packard
If objects on the lru aren't ref counted, they'll get pulled from the gtt as soon as they are freed. This change does cause objects to get stuck in the gtt until they're forced out by new requests. The lru should get cleaned when the irq occurs.
2008-05-06[intel-GEM] Add memory domain support.Keith Packard
Memory domains allow the kernel to track which caches to flush and how to move objects before buffer execution.
2008-05-06Merge commit 'anholt/drm-gem' into drm-gemKeith Packard
2008-05-06Start coding up memory domainsKeith Packard
2008-05-06GEM: Use irq-based fencing rather than syncing and evicting every exec.Eric Anholt
2008-05-06GEM: Skip relocation if presumed offset matches.Eric Anholt