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2008-06-20Add device-specific proc_init and proc_cleanup hooksKeith Packard
This allows device drivers to add proc files
2008-06-20[intel-gem] Use shmem_getpage instead of find_or_create_pageKeith Packard
find_or_create_page doesn't quite set up pages correctly; any newly created pages aren't hooked into the shmem object quite right; user space mmaps of those pages end up mapping pages full of zeros which then get written to the real pages inappropriately. This patch requires that the kernel export shmem_getpage.
2008-06-20[intel-gem] Add DRM_IOCTL_I915_GEM_SW_FINISH to flag CPU writesKeith Packard
When a software fallback has completed, usermode must notify the kernel so that any scanout buffers can be synchronized. This ioctl should be called whenever a fallback completes to flush CPU and chipset caches.
2008-06-16[intel] Quirk away MSI support on 945G/GM.Eric Anholt
The PCI caps register reports MSI support even though it isn't really there.
2008-06-16[linux] Use the device's irq for handler setup instead of stale dev->irq.Eric Anholt
This fixes registration when MSI is set up after the stub function fills in dev->irq. Otherwise /proc/interrupts would report attachment to the fasteoi interrupt. dev->irq is still exposed (and updated at IRQ setup) for the drivers that use it for whatever reason.
2008-06-13[intel-gem] Execute MI_FLUSH in leavevt_ioctlKeith Packard
In leavevt_ioctl, queue an MI_FLUSH and then block waiting for it to complete. This will empty the active and flushing lists. That leaves only the inactive list to evict.
2008-06-13[intel-gem] inactive list may contain objects in CPU write domainKeith Packard
Pin/unpin need to know whether to remove/add objects from the inactive list, inactive objects cannot be in any GPU write domain as those would be on the flushing list instead. However, inactive objects may be in the CPU write domain.
2008-06-13[intel-gem] BUG_ON active objects in gem_object_unbindKeith Packard
Now that gem_object_unbind waits for rendering to complete, objects should not be active when they are being pulled from the GTT. BUG_ON if this is broken.
2008-06-13[intel-gem] Debugging -- verify inactive list invariantsKeith Packard
Inactive list elements may not be pinned, active or have non-CPU write domains.
2008-06-13[intel-gem] whitespace fixesKeith Packard
2008-06-13[intel-gem] show total GTT space in /proc/dri/*/gem_objectsKeith Packard
2008-06-13[intel-gem] Wait for rendering to complete before unbinding.Keith Packard
Moving to the CPU domain doesn't ensure that rendering is finished, the buffer may still be in use as a texture or other data source.
2008-06-13[intel-gem] add gtt and pin counts to /proc/dri/*/gem_objectsKeith Packard
Not quite portable, but these are useful for intel. Some more general mechanism could be done...
2008-06-13[intel-gem] Left the last exec buffer pinned. oops.Keith Packard
Loop end variable 'pinned' was set one too low.
2008-06-13[intel-gem] Pin objects during execbufferKeith Packard
Pinning the objects avoids accidentally evicting them while binding other objects.
2008-06-13[intel-gem] throttle based on frames rather than time. Reduces jitter.Keith Packard
Record the last execbuffer sequence for each client. Record that sequence in the throttle ioctl as the 'throttle sequence'. Wait for the last throttle sequence in the throttle ioctl.
2008-06-13[intel-gem] evict_something was failing when wait_request freed objectsKeith Packard
When i915_wait_request clears object from the active list, it may end up freeing them and not moving them to the inactive list. This ends up unbinding objects from the GTT without there ever being new objects visible to i915_gem_evict_something on the inactive list. As the only success condition required the presence of objects on the inactive list, this would falsely assume that no GTT space had been made available, and end up returning -ENOMEM to the application.
2008-06-13[intel] Enable MSI for i915 IRQKeith Packard
2008-06-13[intel-gem] Use a delayed_work instead of a timer + work_structKeith Packard
We want request retirement to occur about once a second when the request queue is non-empty. This was done with a timer that queued a work_struct, using a delayed_work instead makes a lot more sense.
2008-06-13[intel-gem] Reorder i915_add_request to schedule work lastKeith Packard
i915_add_request was calling schedule_delayed_work before adding the request to the list; it makes more sense to do that last.
2008-06-13Use /bin/pwd instead of trusting shell built-inKeith Packard
2008-06-13[gem] Don't require the lock in execbuf now that it's not needed for the ring.Eric Anholt
2008-06-11[gem] Remove the drm_client_lock_take in set_domain.Eric Anholt
We no longer need to use it to protect against shared ringbuffer access.
2008-06-11[gem] Another round of cleanups from checkpatch.plEric Anholt
2008-06-11[gem] Move potentially device-specific ioctls to the intel driver.Eric Anholt
This is the create (may want location flags), pread/pwrite/mmap (performance tuning hints), and set_domain (will 32 bits be enough for everyone?) ioctls. Left in the generic set are just flink/open/close. The 2D driver must be updated for this change, and API but not ABI is broken for 3D. The driver version is bumped to mark this.
2008-06-11Remove override of drm module list in preparation for merge.Eric Anholt
2008-06-11[gem] Remove carefully-sprinkled i915_kernel_lost_context().Eric Anholt
They are not unnecessary since the kernel's the only thing touching the ring.
2008-06-10[gem] Manage the ringbuffer from the kernel in the GEM case.Eric Anholt
This requires that the X Server use the execbuf interface for buffer submission, as it no longer has direct access to the ring. This is therefore a flag day for the gem interface. This also adds enter/leavevt ioctls for use by the X Server. These would get stubbed out in a modesetting implementation, but are required while in an environment where the device's state is only managed by the DRM while X has the VT.
2008-06-06[intel] remove settable use_mi_batchbuffer_startKeith Packard
The driver can know what hardware requires MI_BATCH_BUFFER vs MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
2008-06-06[intel-gem] Use timers to retire requests periodically.Keith Packard
Without the user IRQ running constantly, there's no wakeup when the ring empties to go retire requests and free buffers. Use a 1 second timer to make that happen more often.
2008-06-06[intel-gem] Add explicit throttle ioctlKeith Packard
Instead of throttling and execbuffer time, have the application ask to throttle explicitly. This allows the throttle to happen less often, and without holding the DRM lock.
2008-06-06[intel-gem] Dump error status on wait_request failureKeith Packard
2008-06-03Drop struct_mutex while waiting in drm_client_lock_takeKeith Packard
struct_mutex cannot be held while blocking on DRM lock.
2008-06-02[intel-gem] reloc_and_validate_object → object_bind_and_relocateKeith Packard
Just renaming this function and related parameters to match terminology used elsewhere in the driver.
2008-06-02[intel-gem] Propagate set_domain errors.Keith Packard
set_domain can block waiting for rendering to complete. If that process is interrupted by a signal, it can return -EINTR. Catch this error in all callers and correctly deal with the result.
2008-05-30Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h shared-core/nouveau_state.c
2008-05-30[intel-gem] Only update obj->write_domain if we're actually changing it.Eric Anholt
The problem was revealed where on 965, the display list vertex buffer would see: create -> (CPU, CPU) set_domain (CPU, CPU) -> (CPU, CPU) set_comain (CPU, 0) -> (CPU, 0) (no clflush occurred) execbuf (GPU, 0) -> (CPU+GPU, 0) (still no clflush) instead of: create -> (CPU, CPU) set_domain (CPU, CPU) -> (CPU, CPU) set_comain (CPU, 0) -> (CPU, CPU) execbuf (GPU, 0) -> (CPU+GPU, 0) (clflushed)
2008-05-30[intel-gem] Add an option to check GTT versus CPU coherency at execbuf time.Eric Anholt
2008-05-29[intel-gem] Write the presumed_offset back out after updating it.Eric Anholt
Otherwise, 965 constant state buffers get re-relocated every exec. Ouch.
2008-05-28[intel-gem] Clean up active/inactive/flushing list debugging.Keith Packard
2008-05-28radeon: split microcode out into a separate header file.Dave Airlie
2008-05-27[intel-gem] Replace idlelock usage with real lock acquisition.Eric Anholt
2008-05-26[intel-gem] Must hold DRM lock while setting object domainKeith Packard
Object domain transfer can involve adding flush ops to the request queue, and so the DRM lock must be held to avoid having the X server smash pointers badly.
2008-05-26[i915] leave interrupts masked off when not in use.Keith Packard
The interrupt enable register cannot be used to temporarily disable interrupts, instead use the interrupt mask register. Note that this change means that a pile of buffers will be left stuck on the chip as the final interrupts will not be recognized to come and drain things.
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25[intel-gem] Compute npages instead of nbytes in flush_pwriteKeith Packard
i915_gem_flush_pwrite optimizes short writes to the buffer by clflushing only the modified pages, but it was miscomputing the number of pages.
2008-05-25[intel-gem] replace call to jiffies_to-msec with simple inlineKeith Packard
2008-05-22[intel-gem] Encourage multiple caches to hold read dataKeith Packard
When reading from multiple domains, allow each cache to continue to hold data until writes occur somewhere. This is done by first leaving the read_domains alone at bind time (presumably the CPU read cache contains valid data still) and then in set_domain, if no write_domain is specified, the new read domains are simply merged into the existing read domains. A huge comment was added above set_domain to explain how things are expected to work.
2008-05-22[gem] Use CPU domain for new or pageable objectsKeith Packard
Newly allocated objects need to be in the CPU domain as they've just been cleared by the CPU. Also, unmapping objects from the GTT needs to put them into the CPU domain, both to flush rendering as well as to ensure that any paging action gets flushed before we remap to the GTT.
2008-05-22[intel-gem] Force ring retire by emiting flush before user-interrupt.Keith Packard
Commands in the ring are parsed and started when the head pointer passes by them, but they are not necessarily finished until a MI_FLUSH happens. This patch inserts a flush after the execbuffer (the only place a flush wasn't already happening).