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2007-04-11add initial drm_fb framebufferDave Airlie
So far I can load fbcon, once I use my miniglx to add a framebuffer. fbcon doesn't show anything on screen but baby steps and all that.
2007-04-10Merge branch 'modesetting-101' of git+ssh://git.freedesktop.org/git/mesa/drm ↵Jesse Barnes
into origin/modesetting-101 Conflicts: linux-core/drm_crtc.c - trivial merge linux-core/drm_crtc.h - trivial merge linux-core/intel_display.c - crtc_config -> mode_config shared-core/i915_dma.c - accommodate new init code in i915_init.c
2007-04-10Finish bringing in LVDS code, re-add to Makefile. Needed other changes too:Jesse Barnes
- move EDID structures to drm_edid.h - add EDID info structure to drm_output - add a few routines to intel_display for getting current mode info - add some prototypes to intel_drv.h and drm_crtc.h
2007-04-09Slam in most of X.Org's i830_lvds (not quite done yet so removed from ↵Jesse Barnes
Makefile.kernel too).
2007-04-05Initial import of modesetting for intel driver in DRMDave Airlie
2007-04-01copy over some files and reorg radeon to add ttm fencing not working yetDave Airlie
2007-03-26nouveau: move card initialisation into the drmBen Skeggs
The PGRAPH init for the various cards will need cleaning up at some point, a lot of the values written there are per-context state left over from the all the hardcoding done in the ddx. It's possible some cards get broken by this commit, let me know. Tested on: NV5, NV18, NV28, NV35, NV40, NV4E
2007-03-19remove i830 referenceAlan Hourihane
2007-03-19Remove old i830 kernel driver.Alan Hourihane
2007-02-16Simple fence object sample driver for via, based on idling the GPU.Thomas Hellstrom
Buffer object driver for via. Some changes to buffer object driver callbacks. Improve fence flushing.
2007-02-14Merge branch 'ttm-vram-0-1-branch'Thomas Hellstrom
2007-02-07Fix a stray unlock_kernel() in drm_vm.cThomas Hellstrom
Add a file for memory move helpers, drm_bo_move.c Implement generic memory move. Cached, no_move and unmapped memory temporarily broken.
2007-02-03nouveau: fix nv04 graph routines for new register names.Stephane Marchesin
2007-01-13nouveau: nv20 graph ctx switch.Matthieu Castet
Untested...
2007-01-13nouveau: first step to make graph ctx worksMatthieu Castet
It is still not working, but now we could use some 3D commands without needed to run nvidia blob before.
2007-01-12nouveau: get nv30 context switching to work.Jeremy Kolb
* Pulled in some registers from nv10reg.h. Needed for context switching. * Filled in nv30 graphics context (based on nv40_graph.c). * Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work.
2007-01-02nouveau: Add nv40-specific PGRAPH code, not hooked up yet.Ben Skeggs
2006-11-06Merge branch 'master' into nouveau-1Dave Airlie
Conflicts: linux-core/Makefile.kernel
2006-11-05nouveau: add compat ioc32 supportDave Airlie
2006-08-27initial import of nouveau code from nouveau CVSDave Airlie
2006-08-25Checkpoint commitThomas Hellstrom
Buffer object code.
2006-08-22Initial i915 buffer object driverThomas Hellstrom
2006-08-22Bring in stripped TTM functionality.Thomas Hellstrom
2006-08-21i915 fence object driver implementing 2 fence object types:Thomas Hellstrom
0x00 EXE fence. Signals when command stream interpreter has reached the point where the fence was emitted. 0x01 FLUSH fence. Signals when command stream interpreter has reached the point where the fence was emitted, and all previous drawing operations have been completed and flushed. Implements busy wait (for fastest response time / high CPU) and lazy wait (User interrupt or timer driven).
2006-08-21Add missing fence type define.Thomas Hellstrom
Add drm_fence.o to Makefile
2006-08-21Backwards compatibility code for ttms.Thomas Hellstrom
2006-08-21Generic DRM support base-class support for user-space objects, likeThomas Hellstrom
fence objects and buffer objects: Refcounting, Inter-process sharing, Synchronization Destruction.
2006-06-06Merge in the drm-sman-branchThomas Hellstrom
2005-10-06Skeleton nv drm driver, to enable DMA in EXA. (Lars Knoll, minor updates byAdam Jackson
me)
2005-09-25Add the via PCI DMA blit code.Thomas Hellstrom
2005-08-22remove i915_pm code as it causes too many issues with current softwareAlan Hourihane
suspend, and the DDX driver re-inits the board successfully anyway.
2005-07-20Add latest r300 support from r300.sf.net CVS. Patch submitted by volodya,Eric Anholt
with BSD fix from jkim and the r300_reg.h license from Nicolai Haehnle. Big thanks to everyone involved!
2005-06-29add i915_ioc32.cAlan Hourihane
2005-06-29add mga and r128 32/64 bitsDave Airlie
This is Egberts code, ported to Pauls framework by me..
2005-06-28Add compat to MakefileDave Airlie
2005-06-28Given that BenH says using the sysdev approach for DRM is bogus, I'll yankAlan Hourihane
the code for it, rather than introducing something that isn't going to work 100% of the time.
2005-06-19Remove I2C support from radeon driver. Same support is available fromJon Smirl
radeonfb.
2005-05-28Re-implement the power management.Alan Hourihane
There's two choices when fb is or isn't loaded as we treat ourselves as a PCI driver in the latter case. If we are a PCI driver, then register the suspend/resume functions directly. If not, then we register as a sysdev and pick up the suspend/resume actions and pump them down into a generic *power function. It'll be nice when this little mess is sorted out with regard to being a real PCI driver ;-/
2005-03-28Via updates:Thomas Hellstrom
New PCI command parser. Moved from via_dma.c to via_verifier.c so functions with similar functionality are close to eachother. Moved video related functions to via_video.c, which might be extended in the future, as new video functionality is added. New device-specific generic IRQ IOCTL, similar to the general VBLANK IOCTL, but with support for multiple device IRQ sources and functionality. Support for Unichrome Pro PM800/CN400 video DMA commands in verifier and PCI parser. Support for Unichrome Pro PM800/CN400 HQV IRQs in the new generic IRQ IOCTL. Bumped minor. New version 2.6.0.
2005-01-16remove duplicate drm_sysfs.oDave Airlie
2005-01-01Completeley rewritten Savage DRM which can be considered secure (moduloFelix Kuehling
implementation errors). Direct hardware (MMIO, BCI) access is no longer needed in the Mesa driver. Bumped version to 2.0.0. Corresponding changes to the DDX and Mesa drivers are being committed.
2004-12-03Added 3D functionality to the via command verifier. Modified the viaThomas Hellstrom
ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-11-05Move ati_pcigart shared routines into drm-core moduleJon Smirl
2004-10-15Move drm_cpu_valid out of drm_init. drm_init is empty now.Jon Smirl
2004-09-30Make the debug memory functions compile for the core model.Jon Smirl
2004-09-27First check in for DRM that splits core from personality modulesJon Smirl
2004-09-24Create new linux-2.6 build. Move all gpl files into the 2.6 build. If youJon Smirl
edit files for 2.6 be sure and break the link to the 2.4 directory and copy the cvs history.
2004-09-17Add linux sysfs i2c support to radeon driver. This patch adds GPL licensedJon Smirl
files to the linux build but not to the BSD directories.
2004-08-29Drop GAMMA DRM from a great height ...Dave Airlie
2004-08-24This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver:Erdi Chen
DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.