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This saves 32k of relocation entry storage for many 965 state buffers. No
noticeable impact on performance for cairo-gl firefox.
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In conjunction with the atomic operation patch, it may be more
convenient for some people to disable building libdrm-intel and its
dependencies upon the atomic intrinsics then it is for them to use a
supported compiler.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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As the target architecture for Intel GPUs is the x86, we can presume to
have reasonable compiler support for Intel atomic intrinsics, i.e. gcc,
and so use those in preference to pulling in a complicated mess of
fragile assembly.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[anholt: hand-resolved against my previous commit. This brings cairo-gl
firefox-talos-gfx time from 65 seconds back down to 62 seconds.]
Signed-off-by: Eric Anholt <eric@anholt.net>
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Set the DONTNEED flag on cached buffers so that the kernel is free to
discard those when under memory pressure.
[anholt: This takes firefox-talos-gfx time from ~62 seconds to ~65 seconds
on my GM965, but it seems like a hit worth taking for the improved
functionality from saving memory]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
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This takes firefox-talos-gfx from 74 seconds to 70 seconds on my GM965.
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There are a bunch of places in GL where if we can't do this we have to
flush the batchbuffer, and the cost of lookups here is outweighed by flush
savings.
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I thought I was going to do all sorts of crazy experiments with it. I never
did, and it turned out the free-after-a-few-seconds plan is working out fine.
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It hasn't been doing anything effective since
52e5d24fae4af6f2f4a5304a516c8c5ab347a11b, and we pretty much don't bo_map
pinned buffers any more anyway.
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These were leaking.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Not sure what intptr_t was up to here.
Reported and tested by: Kevin DeKorte
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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New ids for G41, Clarkdale and Arrandale.
Make sure we don't need to count fence also on new chips.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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This reverts commit 0a732983f059c353b267b6bf877e1f0eea4e033f.
Paul Nieminen and Dave Airlie pointed out on IRC that this shouldn't be
necessary. I was seeing visual corruption in X before I made this change, but
I can't reproduce that anymore so it was probably an unrelated issue.
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This allows users to eliminate explicit bo_wait calls before bo_map calls.
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airlied: modified the interface to drop busy return value, just return
it normally, also fixed int->uint32_t for domain
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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No idea why G80 doesn't hit this, but, this fixes at least one NV40 card.
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Using this call in OUT_BATCH_TABLE reduces radeonEmitState cpu usage from
9% to 5% and emit_vpu goes from 7% to 1.5%. I did use calgrind to profile
gears for cpu hotspots with r500 card.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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GCC did war about optimization not possible because possible forever loop.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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Nasty, but nicer than silently not writing into the pushbuf
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Noticed by vehemens on irc.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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This caches the mapping and just use mapping as a sync point
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inbalances cpu_prep/cpu_finish
- The bo was mapped with sysmem == NULL, so this means cpu prep is called.
- The bo was unmapped with sysmem != NULL, so this means cpu finish is not called.
- This can lead to a non-zero "cpu writers" count in ttm_bo.
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The goal of the BO cache is to keep buffers on hand for fast continuous use,
as in every frame of a game or every batchbuffer of the X Server. Keeping
older buffers on hand not only doesn't serve this purpose, it may hurt
performance by resulting in disk cache getting kicked out, or even driving
the system to swap.
Bug #20766.
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If call was interrupted by signal we have to make call again.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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The logbase2 would overflow and wrap the size around to 0, making the code
allocate a 4kb object instead. By simplifying the code to just walk the
14-entry bucket array comparing sizes instead of indexing on
ffs(1 << logbase2(size)), we avoid silly math errors and have code of
approximately the same speed.
Many thanks to Simon Farnsworth for debugging and providing a working patch.
Bug #27365.
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bug #21999
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integers.
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Based on patch by Pauli Nieminen. Thanks.
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This ports a lot of the space checking code into a the common
library, so that the DDX and mesa can use it.
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We always realloc at least 0x1000 dwords (page on most system)
when growing the cs buffer this is to avoid having to realloc
at each cs_begin.
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This should use ndw not cdw, using cdw leads to realloc alignment going wrong
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the DDX does this and used to handle it internally
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requires --enable-radeon-experimental-api for now
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Normal map() should operate as before, and map_range()/map_flush() should
give correct results but lacking any performance difference from map().
Nothing exiting being done here yet, but the interface is a good start.
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Fixes the dri1 gallium driver if the front buffer happens to be non-linear.
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