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path: root/intel/intel_chipset.h
AgeCommit message (Collapse)Author
2012-09-13intel: add support for ValleyViewJesse Barnes
Just some PCI ID stuff to enable the right features.
2012-08-08intel: add more Haswell PCI IDsPaulo Zanoni
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2012-04-01intel: add Ivy Bridge GT2 server variantEugeni Dodonov
We were missing this one and it is being used by Bromolow. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-03-22intel: Add some PCI IDs for Haswell.Kenneth Graunke
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2011-12-29intel: intel: Add IS_GEN[567] macros.Eric Anholt
These will be used by intel_decode.c, and were taken from intel-gpu-tools. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
2011-12-29intel: Make intel_chipset handle devid directly.Eric Anholt
This will make these macros reusable from intel_decode.c, which doesn't have a bufmgr_gem context, without faking the struct. We should generally only be using these macros from bufmgr_gem context setup anyway. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Eugeni Dodonov <eugeni@dodonov.net>
2010-03-02libdrm/intel: execbuf2 supportJesse Barnes
This patch to libdrm adds support for the new execbuf2 ioctl. If detected, it will be used instead of the old ioctl. By using the new drm_intel_bufmgr_gem_enable_fenced_relocs(), you can indicate that any time a fence register is actually required for a relocation target you will call drm_intel_bo_emit_reloc_fence instead of drm_intel_bo_emit_reloc, which will reduce fence register pressure. Signed-off-by: Eric Anholt <eric@anholt.net>
2010-02-25intel: Add initial support for Sandybridge, and clean up the #defines.Eric Anholt
2009-11-17Move libdrm/ up one levelKristian Høgsberg