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2014-06-19intel: Add new userptr ioctlTvrtko Ursulin
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
2014-06-19intel: Sync typo fix from the kernel sources.Damien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-06-19intel: Sync the command parser version parameter from kernelDamien Lespiau
Cc: Bradley Volkin <bradley.d.volkin@intel.com> Reviewed-by: Brad Volkin <bradley.d.volkin@intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2014-05-19drm: Add universal plane capability bit and plane type enumsMatt Roper
Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-04radeon: sync with radeon_drm.h from kernel headersMarek Olšák
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-01-10intel: Merge latest i915_drm.hBen Widawsky
This was not done as a straight copy because reset_stats IOCTL landed in libdrm before upstream kernel. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-12-03Bump the version to 2.4.50Marek Olšák
2013-11-23radeon: implement 2D tiling for CIKMarek Olšák
Bug fixes and simplification by Marek. We have to use the tile index of 0 for non-MSAA depth-stencil after all. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15intel: Add support for GPU reset status query ioctlIan Romanick
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. This ioctl is in the drm-intel-next tree as b635991. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. v4: Import the actual changes from the kernel i915_drm.h. Only comments on some fields of drm_i915_reset_stats differed. There are still some deltas between the kernel i915_drm.h and the one in libdrm, but those can be resolved in other patches. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3] Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-08Revert "intel: Add support for GPU reset status query ioctl"Dave Airlie
This reverts commit 6335e1d28c422050024bcf4100c4fb3a5bac2afb. No taxation without representation, in other words no userspace without kernel stuff being in a stable location, either drm-next but I'll accept drm-intel-next for intel specific stuff.
2013-11-07intel: Add support for GPU reset status query ioctlIan Romanick
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-06Add DRM_MODE_PAGE_FLIP_ASYNC defineKeith Packard
This exposes the kernel API for performing asynchronous flips Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2013-09-30drm: Sync the DRM_SET_CLIENT_CAP ioctl definitionDamien Lespiau
v2: SET_CAP -> SET_CLIENT_CAP renaming Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-30drm: Synchronize the stereo 3D mode flags from the kernel headersDamien Lespiau
v2: stereo layouts are now an enum (Daniel Vetter) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-09-22libdrm: Make some drm headers compatible with gcc -std=c89 -pedanticDaniel Kurtz
The following minor changes were needed to these headers: * Convert // comments to /* */ * No , after final member of enum With these changes, these header files can be included by a program that is built with gcc options: -std=c89 -Werror -pedantic Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
2013-09-18radeon: Fix tiling mode index for 1D tiled depth/stencil surfaces on CIKMichel Dänzer
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-04libdrm: add missing DRM_CAP_TIMESTAMP_MONOTONICImre Deak
Just add the definition according the kernel's copy of drm.h Signed-off-by: Imre Deak <imre.deak@intel.com>
2013-07-02drm: add hotspot cursor interface support.Dave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-05-09drm: add qxl drm header fileDave Airlie
Now that this driver is merged add the header file. Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-04-27intel: Add support for VEBOX ring (v2)Xiang, Haihao
v2: Fix the test for has_vebox Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-12radeon: update radeon_drm.h to kernel last API additions v2Jerome Glisse
v2: sync with radeon-next tree for 3.10 http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com>
2012-08-10intel: Import updated i915_drm.h.Eric Anholt
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2012-07-16libdrm: add prime fd->handle and handle->fd interfacesDave Airlie
These are just basic ioctl wrappers around the prime ioctls, along with the capability reporting. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-07-16libdrm: add missing caps from kernel to drm.hDave Airlie
This just moves over some missing caps from the kernel. Signed-off-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2012-06-27intel: updated header for contextsBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-By: Kenneth Graunke <kenneth@whitecape.org>
2012-06-08Add support for bitmask propertiesRob Clark
A bitmask property is similar to an enum. The enum value is a bit position (0-63), and valid property values consist of a mask of zero or more of (1 << enum_val[n]). Signed-off-by: Rob Clark <rob@ti.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2012-06-08Add support for generic object properties IOCTLsPaulo Zanoni
New library calls: - drmModeObjectGetProperties - drmModeFreeObjectProperties - drmModeObjectSetProperties Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Rob Clark <rob@ti.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2012-06-06intel: wait render header updatesBen Widawsky
make headers_install in kernel. Copy to here. v2: signed ns_timeout Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-06intel: sanitize i915_drm.hBen Widawsky
run make headers_isntall on d-i-n, copy to here Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-04-11libdrm: update drm headers from kernel for prime/dmabufRob Clark
Sync drm.h with from kernel headers for the new PRIME_HANDLE_TO_FD and PRIME_FD_TO_HANDLE ioctls from Dave Airlie's "drm: base prime/ dma-buf support (v5)" kernel patch. Signed-off-by: Rob Clark <rob@ti.com>
2012-03-05Make drm/drm_fourcc.h portable to non-linux platformsAlan Coopersmith
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
2012-02-01radeon: add surface allocator helper v10Jerome Glisse
The surface allocator is able to build complete miptree when allocating surface for r600/r700/evergreen/northern islands GPU family. It also compute bo size and alignment for render buffer, depth buffer and scanout buffer. v2 fix r6xx/r7xx 2D tiling width align computation v3 add tile split support and fix 1d texture alignment v4 rework to more properly support compressed format, split surface pixel size and surface element size in separate fields v5 support texture array (still issue on r6xx) v6 split surface value computation and mipmap tree building, rework eg and newer computation v7 add a check for tile split and 2d tiled v8 initialize mode value before testing it in all case, reenable 2D macro tile mode on r6xx for cubemap and array. Fix cubemap to force array size to the number of face. v9 fix handling of stencil buffer on evergreen v10 on evergreen depth buffer need to have enough room for a stencil buffer just after depth one Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2012-02-01intel: query for LLC supportEugeni Dodonov
This adds support for querying the kernel about the LLC support in the hardware. In case the ioctl fails, we assume that it is present on GEN6 and GEN7. v2: fix the return code checking Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-01-09intel: add sprite ioctl defines and struct for i915 sprite codeJesse Barnes
2012-01-04intel: Update for new i915_drm.h defines.Eric Anholt
2011-12-13libdrm: update drm headers from kernel, including new overlay ioctls & structsJesse Barnes
Add structs and functions necessary for the new plane and fb handling code, including a new header, drm_fourcc.h, that includes the surface formats supported by various DRM drivers. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-04-04libdrm: (revised) vblank wait on crtc > 1Ilija Hadzic
Hi Alex, Enclosed is a revised version of the patch sent on Mar 18, against the master branch of the drm userspace (i.e. libdrm). Details summarised in this thread: http://lists.freedesktop.org/archives/dri-devel/2011-March/009499.html This patch reconciles libdrm with the the kernel change that Dave pushed this morning. It *supersedes* the previously sent patch (i.e. apply it to the master branch as it exists at the time of this writing, not as an incremental patch to the one sent previously). Regards, Ilija Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-03-30drm_mode: fix types on recently added ioctlsDave Airlie
2011-03-04Implement drmGetCap() to query device/driver capabilitiesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-03-04drm: add dumb interfaceDave Airlie
2011-03-01intel: Add I915_PARAM_HAS_RELAXED_DELTAChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-19intel: Export CONSTANT_BUFFER addressing modeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29intel: enable relaxed fence allocation for i915Chris Wilson
The kernel has always allowed userspace to underallocate objects supplied for fencing. However, the kernel only allocated the object size for the fence in the GTT and so caused tiling corruption. More recently the kernel does allocate the full fence region in the GTT for an under-sized object and so advertises that clients may finally make use of this feature. The biggest benefit is for texture-heavy GL games on i945 such as World of Padman which go from needing over 1GiB of RAM to play to fitting in the GTT! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-26intel: Prepare for BLT ring split.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-21nouveau: Define the HAS_PAGEFLIP getparam.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
2010-10-12nouveau: Define buffer object usage flags.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Acked-by: Ben Skeggs <bskeggs@redhat.com>
2010-08-26Avoid use of c++ reserved keyword "virtual" when using a C++ compiler.Eric Anholt
Avoids requiring nasty hacks around libdrm headers in the new C++ parts of Mesa drivers.
2010-08-04Copy headers from kernel drm-core-nextDave Airlie
2010-06-06intel: Add support for kernel multi-ringbuffer API.Zou Nan hai
This introduces a new API to exec on BSD ring buffer, for H.264 VLD decoding. Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com> Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
2010-05-12Pull in new kernel headersKristian Høgsberg
Changes struct drm_mode_crtc_page_flip to use __u32 instead of uint32_t, fixes https://bugs.freedesktop.org/show_bug.cgi?id=26994
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