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2008-07-01i915: only use tiled blits on 965+Jesse Barnes
When scheduled swaps occur, we need to blit between front & back buffers. If the buffers are tiled, we need to set the appropriate XY_SRC_COPY tile bit, but only on 965 chips, since it will cause corruption on pre-965 (e.g. 945). Bug reported by and fix tested by Tomas Janousek <tomi@nomi.cz>. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01i915: enable bus mastering on i915 at resume timeJie Luo
On 9xx chips, bus mastering needs to be enabled at resume time for much of the chip to function. With this patch, vblank interrupts will work as expected on resume, along with other chip functions. Fixes kernel bugzilla #10844. Signed-off-by: Jie Luo <clotho67@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-01NV50: switch to fixed point scale factor calculationsMaarten Maathuis
2008-07-01NV50: some i2c cleanupMaarten Maathuis
2008-06-27NV50: use list_head item instead of list_head head to avoid confusionMaarten Maathuis
2008-06-27Change some obviously wrong things about property blobs, still broken though.Maarten Maathuis
- I do not fully understand these blobs, so i'm leaving it at this for the moment.
2008-06-27[modesetting-101] Actually store properties when being changed.Maarten Maathuis
2008-06-27NV50: A minor change.Maarten Maathuis
2008-06-27NV50: Implement DPMS.Maarten Maathuis
2008-06-26[modesetting-101] tab-cleanupMaarten Maathuis
2008-06-26Revert "modesetting-101: Make dpms property optional + misc cleanup."Maarten Maathuis
This reverts commit 13943fe5823c45759091c1a1f487a4abe377421e.
2008-06-26modesetting-101: Make dpms property optional + misc cleanup.Maarten Maathuis
- intel_crt seems the only one to provide it, so init it there.
2008-06-25NV50: i misunderstood NOUVEAU_MEM_INTERNAL, so remove itMaarten Maathuis
2008-06-25NV50: Some cleanup and fixes.Maarten Maathuis
2008-06-25nv50: when destroying a channel make sure it's not still current on PFIFOBen Skeggs
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose().
2008-06-25nouveau: allocate drm-use vram buffers from end of vram.Ben Skeggs
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already.
2008-06-25nv50: when destroying a channel make sure it's not still current on PFIFOBen Skeggs
We won't get a PFIFO context switch when the same channel ID is recreated if the hw still thinks the channel is already active, which causes fun issues. Should allow X to be stopped and started without tearing down the entire card state in lastclose().
2008-06-24silence warningroot
2008-06-24[intel] Get vblank pipe from irq_mask_reg instead of hardware enable regKeith Packard
With the interrupt enable/disable using only the mask register, it was wrong to use the enable register to detect which pipes had vblank detection turned on. Also, as we keep a local copy of the mask register around, and MSI machines smack the hardware during the interrupt handler, it is more efficient and more correct to use the local copy.
2008-06-24[intel] Create functions to enable/disable interruptsKeith Packard
This shares common code sequences for managing the interrupt register bits
2008-06-24i915: remove unused variableJesse Barnes
Leftover dev_priv from the move of the suspend/resume code into shared-core.
2008-06-24i915: register definition & header file cleanupJesse Barnes
It would be nice if one day the DRM driver was the canonical source for register definitions and core macros. To that end, this patch cleans things up quite a bit, removing redundant definitions (some with different names referring to the same register) and generally tidying up the header file.
2008-06-24NV50: minor changeMaarten Maathuis
2008-06-24Merge branch 'drm-gem' into drm-gem-965Keith Packard
2008-06-24[intel-gem] Include drm_compat.h to get kmap_atomic_prot_pfnKeith Packard
2008-06-24drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-24[intel-gem] Use I915_GEM_DOMAIN_GTT in dri_gem_bo_wait_rendering.Keith Packard
I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires clflushing the frame buffer.
2008-06-24[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-24[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-24Was using irq_enable_reg in the use_mask_reg pathKeith Packard
2008-06-24NV50: fix a few misc thingsMaarten Maathuis
2008-06-24NV50: fix cursor hide/showMaarten Maathuis
2008-06-24NV50: These are actually errors.Maarten Maathuis
2008-06-23[intel-gem] Include drm_compat.h to get kmap_atomic_prot_pfnKeith Packard
2008-06-23drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-24NV50: fix some misc bugsMaarten Maathuis
2008-06-23[modesetting-101] update mode count after fill_modes.Maarten Maathuis
- This avoids returning with a mode count of 0, thus not allocating space for the 2nd ioctl.
2008-06-23libdrm: check for allocation failureMaarten Maathuis
2008-06-23NV50: Improve set_config and fix some minor bugs.Maarten Maathuis
2008-06-23[intel-gem] Use I915_GEM_DOMAIN_GTT in dri_gem_bo_wait_rendering.Keith Packard
I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires clflushing the frame buffer.
2008-06-23[intel] leave interrupts disabled in ISR only on MSI againKeith Packard
While debugging the 915, I tried this trick there and accidentally left it set.
2008-06-23[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-23[intel] Switch to using IMR instead of IERKeith Packard
2008-06-23[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-23[intel] allow the irq code to use either enable or mask registersKeith Packard
still not sure which works best on which hardware; this will make it easier to experiment.
2008-06-22nouveau: disable KMS for pre-NV50 even when specifically enabledMaarten Maathuis
2008-06-22NV50: Fix a few more possible leaks.Maarten Maathuis
2008-06-22fix typoMaarten Maathuis
2008-06-22NV50: A few minor added safeties + cleanup.Maarten Maathuis
2008-06-23nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size..Ben Skeggs
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