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2007-06-28nouveau: simplify PRAMIN accessBen Skeggs
2007-06-28nouveau: name some regsBen Skeggs
2007-06-28nouveau/nv50: skeletal backendBen Skeggs
2007-06-28nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7)Ben Skeggs
For various reasons, this ioctl was a bad idea. At channel creation we now automatically create DMA objects covering available VRAM and GART memory, where the client used to do this themselves. However, there is still a need to be able to create DMA objects pointing at specific areas of memory (ie. notifiers). Each channel is now allocated a small amount of memory from which a client can suballocate things (such as notifiers), and have a DMA object created which covers the suballocated area. The NOTIFIER_ALLOC ioctl exposes this functionality.
2007-06-28nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaksBen Skeggs
2007-06-26More 64-bit padding.Thomas Hellstrom
2007-06-26Clean up warnings about unused variables and functions.Ian Romanick
2007-06-26Clean up mixed declarations and code.Ian Romanick
2007-06-26Revert over-zealous change from previous commit.Ian Romanick
2007-06-26Add XGI driver to Makefiles.Ian Romanick
2007-06-26Clean up compile-time kernel feature detection.Ian Romanick
2007-06-26linux/config.h is deprecated or gone.Ian Romanick
2007-06-26Gut support for pre-2.6 kernels.Ian Romanick
2007-06-26dos2unix and LindentIan Romanick
2007-06-26Initial XP10 code drop from XGI.Ian Romanick
See attachment 10246 on https://bugs.freedesktop.org/show_bug.cgi?id=5921
2007-06-26Add support SiS based XGI chips to SiS DRM.Ian Romanick
2007-06-25nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303Ben Skeggs
2007-06-24nouveau: kill some dead codeBen Skeggs
2007-06-24nouveau: NV04/NV10/NV20 PGRAPH engtab functionsBen Skeggs
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about how they work to implement them sanely. The "old" context_switch() code remains hooked up, so it shouldn't break anything. NV20 will probably break if load_context() works. No inital context values are filled in, so when the first channel is created PGRAPH will probably end up having its state zeroed. Some setup from nv20_graph_init() will probably need to be moved to the per-channel context setup.
2007-06-24nouveau: NV3X PGRAPH engtab functionsBen Skeggs
2007-06-24nouveau: NV1X/2X/3X PFIFO engtab functionsBen Skeggs
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size.
2007-06-24nouveau: NV04 PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PGRAPH engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: split PFIFO/PGRAPH context creationBen Skeggs
2007-06-24nouveau: (mostly) hook up put_base againBen Skeggs
2007-06-24nouveau: prototype PFIFO/PGRAPH engtab APIBen Skeggs
2007-06-24nouveau: rename engtab functionsBen Skeggs
2007-06-22radeon: Acknowledge all interrupts we're interested in.Michel Dänzer
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-21r300: Synchronized the register defines file; documentation changes.Oliver McFadden
2007-06-21r300: Allow writes to R300_VAP_PVS_WAITIDLE.Oliver McFadden
2007-06-18r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1.Oliver McFadden
2007-06-18r300: Synchronized the register defines file again.Oliver McFadden
2007-06-18fix radeon setparam on 32/64 systems, harder.David Woodhouse
Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was to handle the fact that on i386, alignof(uint64_t)==4. Unfortunately, this handler was installed for _all_ 64-bit architectures, instead of only x86_64 and ia64. And thus it breaks 32-bit compatibility on every other arch, where 64-bit integers are aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode. Arnd has a cunning plan to use 'compat_u64' with appropriate alignment attributes according to the 32-bit ABI, but for now let's just make the compat_radeon_cp_setparam routine entirely disappear on 64-bit machines whose 32-bit compat support isn't for i386. It would be a no-op with compat_u64 anyway. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-15i915: Fix handling of breadcrumb counter wraparounds.Michel Dänzer
2007-06-15Fix i915 sequence mask.Thomas Hellstrom
2007-06-15Indentation fixes.Thomas Hellstrom
2007-06-15Fix refcounting / lock race.Thomas Hellstrom
Reported by Steve Wilkins / Michel Dänzer.
2007-06-15Locking fixes and instrumentation.Thomas Hellstrom
2007-06-13Fix drmMMUnlock / drmMMLock return values.Thomas Hellstrom
2007-06-13Make sure we read fence->signaled while spinlocked.Thomas Hellstrom
2007-06-13Fix fence object deref race.Thomas Hellstrom
2007-06-12Fix some obvious bugs.Thomas Hellstrom
2007-06-12Try to make buffer object / fence object ioctl args 64-bit safe.Thomas Hellstrom
Introduce tile members for future tiled buffer support. Allow user-space to explicitly define a fence-class. Remove the implicit fence-class mechanism. 64-bit wide buffer object flag member.
2007-06-10use krh's idr mods to remove lists from idr codeDave Airlie
2007-06-08r300: Added the CP maximum fetch size and ring rptr update variables.Oliver McFadden
2007-06-07oops must fix this properly at some pointDave Airlie
2007-06-07drm: fix radeon setparam alignment issues on 32/64-bitDave Airlie
2007-06-07radeon: PCIGART memory is Can't map aperture as well there is oneDave Airlie
on the CPU.... with this my indirect buffers at least start to live.. (cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122)
2007-06-05r300: Small correction to the previous commit.Oliver McFadden
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