index : renesas/drm.git	android live master
	libdrm, cloned from git://anongit.freedesktop.org/mesa/drm	Laurent Pinchart

summaryrefslogtreecommitdiff

log msg author committer range

Age	Commit message (Expand)	Author
2000-02-12	file Makefile.linuxpoll was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-02-12	file mga_dmapoll.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-02-12	file i810_drm_public.h was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-02-06	file mga_state.h was initially added on branch mga-0-0-1-branch.	Keith Whitwell
2000-02-04	file mga_dma.h was initially added on branch mga-0-0-1-branch.	Keith Whitwell
2000-02-04	file mga_clear.c was initially added on branch mga-0-0-1-branch.	Keith Whitwell
2000-01-28	Fixed freelist_put bug	Jeff Hartmann
2000-01-27	file mga_state.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-27	file mga_drm_public.h was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-19	file mgareg_flags.h was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-17	Try a more complex (and more correct?) method for finding kernel inlcude	Rik Faith
2000-01-15	Remove -g from build Fix lost code from tdfx-1-1 merge in tdfx_priv.c Lower	Daryll Strauss
2000-01-13	Add new code to do SMP/MODVERSIONS detection for more distributions	Rik Faith
2000-01-12	Add a drm_poll function to the tdfx driver. This fixes the problem with	Daryll Strauss
2000-01-08	file i810_dma.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-08	file i810_drv.h was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-08	file i810_drv.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-08	file i810_bufs.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-08	file i810_context.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-07	Merge between X_3_9_16 and X_3_9_17 Compiles but may not run.	Rik Faith
2000-01-06	file mga_bufs.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-06	file mga_context.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-06	file ctxbitmap.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
2000-01-06	Import of XFree86 3.9.17	Rik Faith
1999-12-18	Rename the device to be /dev/dri instead of /dev/dri to avoid a conflict.	Daryll Strauss
1999-12-17	file agpsupport.c was initially added on branch ati-4-0-0-branch.	Rik Faith
1999-12-17	file r128_drv.c was initially added on branch ati-4-0-0-branch.	Rik Faith
1999-12-17	file r128_context.c was initially added on branch ati-4-0-0-branch.	Rik Faith
1999-12-17	file r128_drv.h was initially added on branch ati-4-0-0-branch.	Rik Faith
1999-12-15	file mga_drv.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
1999-12-15	file mga_dma.c was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
1999-12-15	file mga_drv.h was initially added on branch mga-0-0-1-branch.	Jeff Hartmann
1999-12-08	Sync with Linux 2.3.30	Rik Faith
1999-12-07	Move Mesa to xc/extras Update to the latest Mesa 3.2 code Fix the Q3Demo	Daryll Strauss
1999-12-05	First DRI release of 3dfx driver.	Daryll Strauss
1999-12-05	Import XFree 3.9.16	Daryll Strauss
1999-12-05	Initial revision	Daryll Strauss

• [prev]

generated by cgit v1.2.3 (git 2.25.1) at 2025-08-16 11:53:07 +0000

#include "drmP.h"
#include "drm.h"
#include "nouveau_drv.h"
#include "nouveau_drm.h"

/*
 * NV20
 * -----
 * There are 3 families :
 * NV20 is 0x10de:0x020*
 * NV25/28 is 0x10de:0x025* / 0x10de:0x028*
 * NV2A is 0x10de:0x02A0
 *
 * NV30
 * -----
 * There are 3 families :
 * NV30/31 is 0x10de:0x030* / 0x10de:0x031*
 * NV34 is 0x10de:0x032*
 * NV35/36 is 0x10de:0x033* / 0x10de:0x034*
 *
 * Not seen in the wild, no dumps (probably NV35) :
 * NV37 is 0x10de:0x00fc, 0x10de:0x00fd
 * NV38 is 0x10de:0x0333, 0x10de:0x00fe
 *
 */

#define NV20_GRCTX_SIZE (3580*4)
#define NV25_GRCTX_SIZE (3529*4)
#define NV2A_GRCTX_SIZE (3500*4)

#define NV30_31_GRCTX_SIZE (24392)
#define NV34_GRCTX_SIZE    (18140)
#define NV35_36_GRCTX_SIZE (22396)

static void nv20_graph_context_init(struct drm_device *dev,
                                    struct nouveau_gpuobj *ctx)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;
/*
write32 #1 block at +0x00740adc NV_PRAMIN+0x40adc of 3369 (0xd29) elements:
+0x00740adc: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b3c: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000
+0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bbc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bfc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

+0x00740c1c: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000
+0x00740c3c: 00000000 00000000 00000000 44400000 00000000 00000000 00000000 00000000
+0x00740c5c: 00000000 00000000 00000000 00000000 00000000 00000000 00030303 00030303
+0x00740c7c: 00030303 00030303 00000000 00000000 00000000 00000000 00080000 00080000
+0x00740c9c: 00080000 00080000 00000000 00000000 01012000 01012000 01012000 01012000
+0x00740cbc: 000105b8 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008
+0x00740cdc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740cfc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
+0x00740d1c: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
+0x00740d3c: 00000000 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000

+0x00740d5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d9c: 00000001 00000000 00004000 00000000 00000000 00000001 00000000 00040000
+0x00740dbc: 00010000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740ddc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
...
*/
	INSTANCE_WR(ctx, (0x33c/4)+0, 0xffff0000);
	INSTANCE_WR(ctx, (0x33c/4)+25, 0x0fff0000);
	INSTANCE_WR(ctx, (0x33c/4)+26, 0x0fff0000);
	INSTANCE_WR(ctx, (0x33c/4)+80, 0x00000101);
	INSTANCE_WR(ctx, (0x33c/4)+85, 0x00000111);
	INSTANCE_WR(ctx, (0x33c/4)+91, 0x44400000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+102+i, 0x00030303);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+110+i, 0x00080000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+116+i, 0x01012000);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+120+i, 0x000105b8);
	for (i = 0; i < 4; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+124+i, 0x00080008);
	for (i = 0; i < 16; ++i)
		INSTANCE_WR(ctx, (0x33c/4)+136+i, 0x07ff0000);
	INSTANCE_WR(ctx, (0x33c/4)+154, 0x4b7fffff);
	INSTANCE_WR(ctx, (0x33c/4)+176, 0x00000001);
	INSTANCE_WR(ctx, (0x33c/4)+178, 0x00004000);
	INSTANCE_WR(ctx, (0x33c/4)+181, 0x00000001);
	INSTANCE_WR(ctx, (0x33c/4)+183, 0x00040000);
	INSTANCE_WR(ctx, (0x33c/4)+184, 0x00010000);

/*
...
+0x0074239c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x007423bc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x007423dc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x007423fc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
...
+0x00742bdc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742bfc: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742c1c: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742c3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
...
*/
	for (i = 0; i < 0x880; i += 0x10) {
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+0, 0x10700ff9);
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+1, 0x0436086c);
		INSTANCE_WR(ctx, ((0x1c1c + i)/4)+2, 0x000c001b);
	}

/*
write32 #1 block at +0x00742fbc NV_PRAMIN+0x42fbc of 4 (0x4) elements:
+0x00742fbc: 3f800000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x281c/4), 0x3f800000);

/*
write32 #1 block at +0x00742ffc NV_PRAMIN+0x42ffc of 12 (0xc) elements:
+0x00742ffc: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000
+0x0074301c: 00000000 bf800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x285c/4)+0, 0x40000000);
	INSTANCE_WR(ctx, (0x285c/4)+1, 0x3f800000);
	INSTANCE_WR(ctx, (0x285c/4)+2, 0x3f000000);
	INSTANCE_WR(ctx, (0x285c/4)+4, 0x40000000);
	INSTANCE_WR(ctx, (0x285c/4)+5, 0x3f800000);
	INSTANCE_WR(ctx, (0x285c/4)+7, 0xbf800000);
	INSTANCE_WR(ctx, (0x285c/4)+9, 0xbf800000);

/*
write32 #1 block at +0x00742fcc NV_PRAMIN+0x42fcc of 4 (0x4) elements:
+0x00742fcc: 00000000 3f800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x282c/4)+1, 0x3f800000);

/*
write32 #1 block at +0x0074302c NV_PRAMIN+0x4302c of 4 (0x4) elements:
+0x0074302c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743c9c NV_PRAMIN+0x43c9c of 4 (0x4) elements:
+0x00743c9c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743c3c NV_PRAMIN+0x43c3c of 8 (0x8) elements:
+0x00743c3c: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x349c/4)+2, 0x000fe000);

/*
write32 #1 block at +0x00743c6c NV_PRAMIN+0x43c6c of 4 (0x4) elements:
+0x00743c6c: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743ccc NV_PRAMIN+0x43ccc of 4 (0x4) elements:
+0x00743ccc: 00000000 000003f8 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x352c/4)+1, 0x000003f8);

/* write32 #1 NV_PRAMIN+0x43ce0 <- 0x002fe000 */
	INSTANCE_WR(ctx, 0x3540/4, 0x002fe000);

/*
write32 #1 block at +0x00743cfc NV_PRAMIN+0x43cfc of 8 (0x8) elements:
+0x00743cfc: 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c 001c527c
*/
	for (i = 0; i < 8; ++i)
		INSTANCE_WR(ctx, (0x355c/4)+i, 0x001c527c);
}

static void nv2a_graph_context_init(struct drm_device *dev,
                                    struct nouveau_gpuobj *ctx)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;

	INSTANCE_WR(ctx, 0x33c/4, 0xffff0000);
	for(i = 0x3a0; i< 0x3a8; i += 4)
		INSTANCE_WR(ctx, i/4, 0x0fff0000);
	INSTANCE_WR(ctx, 0x47c/4, 0x00000101);
	INSTANCE_WR(ctx, 0x490/4, 0x00000111);
	INSTANCE_WR(ctx, 0x4a8/4, 0x44400000);
	for(i = 0x4d4; i< 0x4e4; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00030303);
	for(i = 0x4f4; i< 0x504; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00080000);
	for(i = 0x50c; i< 0x51c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x01012000);
	for(i = 0x51c; i< 0x52c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x000105b8);
	for(i = 0x52c; i< 0x53c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x00080008);
	for(i = 0x55c; i< 0x59c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x07ff0000);
	INSTANCE_WR(ctx, 0x5a4/4, 0x4b7fffff);
	INSTANCE_WR(ctx, 0x5fc/4, 0x00000001);
	INSTANCE_WR(ctx, 0x604/4, 0x00004000);
	INSTANCE_WR(ctx, 0x610/4, 0x00000001);
	INSTANCE_WR(ctx, 0x618/4, 0x00040000);
	INSTANCE_WR(ctx, 0x61c/4, 0x00010000);

	for (i=0x1a9c; i <= 0x22fc/4; i += 32) {
		INSTANCE_WR(ctx, i/4    , 0x10700ff9);
		INSTANCE_WR(ctx, i/4 + 1, 0x0436086c);
		INSTANCE_WR(ctx, i/4 + 2, 0x000c001b);
	}

	INSTANCE_WR(ctx, 0x269c/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26b0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26dc/4, 0x40000000);
	INSTANCE_WR(ctx, 0x26e0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26e4/4, 0x3f000000);
	INSTANCE_WR(ctx, 0x26ec/4, 0x40000000);
	INSTANCE_WR(ctx, 0x26f0/4, 0x3f800000);
	INSTANCE_WR(ctx, 0x26f8/4, 0xbf800000);
	INSTANCE_WR(ctx, 0x2700/4, 0xbf800000);
	INSTANCE_WR(ctx, 0x3024/4, 0x000fe000);
	INSTANCE_WR(ctx, 0x30a0/4, 0x000003f8);
	INSTANCE_WR(ctx, 0x33fc/4, 0x002fe000);
	for(i = 0x341c; i< 0x343c; i += 4)
		INSTANCE_WR(ctx, i/4, 0x001c527c);
}

static void nv25_graph_context_init(struct drm_device *dev,
                                    struct nouveau_gpuobj *ctx)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	int i;
/*
write32 #1 block at +0x00740a7c NV_PRAMIN.GRCTX0+0x35c of 173 (0xad) elements:
+0x00740a7c: ffff0000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740a9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740abc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740adc: 00000000 0fff0000 0fff0000 00000000 00000000 00000000 00000000 00000000
+0x00740afc: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b1c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b3c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b5c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

+0x00740b7c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740b9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740bbc: 00000101 00000000 00000000 00000000 00000000 00000111 00000000 00000000
+0x00740bdc: 00000000 00000000 00000000 00000080 ffff0000 00000001 00000000 00000000
+0x00740bfc: 00000000 00000000 44400000 00000000 00000000 00000000 00000000 00000000
+0x00740c1c: 4b800000 00000000 00000000 00000000 00000000 00030303 00030303 00030303
+0x00740c3c: 00030303 00000000 00000000 00000000 00000000 00080000 00080000 00080000
+0x00740c5c: 00080000 00000000 00000000 01012000 01012000 01012000 01012000 000105b8

+0x00740c7c: 000105b8 000105b8 000105b8 00080008 00080008 00080008 00080008 00000000
+0x00740c9c: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 07ff0000
+0x00740cbc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000
+0x00740cdc: 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 07ff0000 00000000
+0x00740cfc: 00000000 4b7fffff 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d1c: 00000000 00000000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x35c/4)+0, 0xffff0000);
	INSTANCE_WR(ctx, (0x35c/4)+25, 0x0fff0000);
	INSTANCE_WR(ctx, (0x35c/4)+26, 0x0fff0000);
	INSTANCE_WR(ctx, (0x35c/4)+80, 0x00000101);
	INSTANCE_WR(ctx, (0x35c/4)+85, 0x00000111);
	INSTANCE_WR(ctx, (0x35c/4)+91, 0x00000080);
	INSTANCE_WR(ctx, (0x35c/4)+92, 0xffff0000);
	INSTANCE_WR(ctx, (0x35c/4)+93, 0x00000001);
	INSTANCE_WR(ctx, (0x35c/4)+98, 0x44400000);
	INSTANCE_WR(ctx, (0x35c/4)+104, 0x4b800000);
	INSTANCE_WR(ctx, (0x35c/4)+109, 0x00030303);
	INSTANCE_WR(ctx, (0x35c/4)+110, 0x00030303);
	INSTANCE_WR(ctx, (0x35c/4)+111, 0x00030303);
	INSTANCE_WR(ctx, (0x35c/4)+112, 0x00030303);
	INSTANCE_WR(ctx, (0x35c/4)+117, 0x00080000);
	INSTANCE_WR(ctx, (0x35c/4)+118, 0x00080000);
	INSTANCE_WR(ctx, (0x35c/4)+119, 0x00080000);
	INSTANCE_WR(ctx, (0x35c/4)+120, 0x00080000);
	INSTANCE_WR(ctx, (0x35c/4)+123, 0x01012000);
	INSTANCE_WR(ctx, (0x35c/4)+124, 0x01012000);
	INSTANCE_WR(ctx, (0x35c/4)+125, 0x01012000);
	INSTANCE_WR(ctx, (0x35c/4)+126, 0x01012000);
	INSTANCE_WR(ctx, (0x35c/4)+127, 0x000105b8);
	INSTANCE_WR(ctx, (0x35c/4)+128, 0x000105b8);
	INSTANCE_WR(ctx, (0x35c/4)+129, 0x000105b8);
	INSTANCE_WR(ctx, (0x35c/4)+130, 0x000105b8);
	INSTANCE_WR(ctx, (0x35c/4)+131, 0x00080008);
	INSTANCE_WR(ctx, (0x35c/4)+132, 0x00080008);
	INSTANCE_WR(ctx, (0x35c/4)+133, 0x00080008);
	INSTANCE_WR(ctx, (0x35c/4)+134, 0x00080008);
	for (i=0; i<16; ++i)
		INSTANCE_WR(ctx, (0x35c/4)+143+i, 0x07ff0000);
	INSTANCE_WR(ctx, (0x35c/4)+161, 0x4b7fffff);

/*
write32 #1 block at +0x00740d34 NV_PRAMIN.GRCTX0+0x614 of 3136 (0xc40) elements:
+0x00740d34: 00000000 00000000 00000000 00000080 30201000 70605040 b0a09080 f0e0d0c0
+0x00740d54: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00740d74: 00000000 00000000 00000000 00000000 00000001 00000000 00004000 00000000
+0x00740d94: 00000000 00000001 00000000 00040000 00010000 00000000 00000000 00000000
+0x00740db4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
...
+0x00742214: 00000000 00000000 00000000 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742234: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742254: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742274: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
...
+0x00742a34: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742a54: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742a74: 10700ff9 0436086c 000c001b 00000000 10700ff9 0436086c 000c001b 00000000
+0x00742a94: 10700ff9 0436086c 000c001b 00000000 00000000 00000000 00000000 00000000
+0x00742ab4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
+0x00742ad4: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x614/4)+3, 0x00000080);
	INSTANCE_WR(ctx, (0x614/4)+4, 0x30201000);
	INSTANCE_WR(ctx, (0x614/4)+5, 0x70605040);
	INSTANCE_WR(ctx, (0x614/4)+6, 0xb0a09080);
	INSTANCE_WR(ctx, (0x614/4)+7, 0xf0e0d0c0);
	INSTANCE_WR(ctx, (0x614/4)+20, 0x00000001);
	INSTANCE_WR(ctx, (0x614/4)+22, 0x00004000);
	INSTANCE_WR(ctx, (0x614/4)+25, 0x00000001);
	INSTANCE_WR(ctx, (0x614/4)+27, 0x00040000);
	INSTANCE_WR(ctx, (0x614/4)+28, 0x00010000);
	for (i=0; i < 0x880/4; i+=4) {
		INSTANCE_WR(ctx, (0x1b04/4)+i+0, 0x10700ff9);
		INSTANCE_WR(ctx, (0x1b04/4)+i+1, 0x0436086c);
		INSTANCE_WR(ctx, (0x1b04/4)+i+2, 0x000c001b);
	}

/*
write32 #1 block at +0x00742e24 NV_PRAMIN.GRCTX0+0x2704 of 4 (0x4) elements:
+0x00742e24: 3f800000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x2704/4), 0x3f800000);

/*
write32 #1 block at +0x00742e64 NV_PRAMIN.GRCTX0+0x2744 of 12 (0xc) elements:
+0x00742e64: 40000000 3f800000 3f000000 00000000 40000000 3f800000 00000000 bf800000
+0x00742e84: 00000000 bf800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x2744/4)+0, 0x40000000);
	INSTANCE_WR(ctx, (0x2744/4)+1, 0x3f800000);
	INSTANCE_WR(ctx, (0x2744/4)+2, 0x3f000000);
	INSTANCE_WR(ctx, (0x2744/4)+4, 0x40000000);
	INSTANCE_WR(ctx, (0x2744/4)+5, 0x3f800000);
	INSTANCE_WR(ctx, (0x2744/4)+7, 0xbf800000);
	INSTANCE_WR(ctx, (0x2744/4)+9, 0xbf800000);

/*
write32 #1 block at +0x00742e34 NV_PRAMIN.GRCTX0+0x2714 of 4 (0x4) elements:
+0x00742e34: 00000000 3f800000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x2714/4)+1, 0x3f800000);

/*
write32 #1 block at +0x00742e94 NV_PRAMIN.GRCTX0+0x2774 of 4 (0x4) elements:
+0x00742e94: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743804 NV_PRAMIN.GRCTX0+0x30e4 of 4 (0x4) elements:
+0x00743804: 00000000 00000000 00000000 00000000
write32 #1 block at +0x007437a4 NV_PRAMIN.GRCTX0+0x3084 of 8 (0x8) elements:
+0x007437a4: 00000000 00000000 000fe000 00000000 00000000 00000000 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x3084/4)+2, 0x000fe000);

/*
write32 #1 block at +0x007437d4 NV_PRAMIN.GRCTX0+0x30b4 of 4 (0x4) elements:
+0x007437d4: 00000000 00000000 00000000 00000000
write32 #1 block at +0x00743824 NV_PRAMIN.GRCTX0+0x3104 of 4 (0x4) elements:
+0x00743824: 00000000 000003f8 00000000 00000000
*/
	INSTANCE_WR(ctx, (0x3104/4)+1, 0x000003f8);

/* write32 #1 NV_PRAMIN.GRCTX0+0x3468 <- 0x002fe000 */
	INSTANCE_WR(ctx, 0x3468/4, 0x002fe000);

/*