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2008-01-23i915/flush: get the ret the right way aroundDave Airlie
2008-01-23drm/i915: add support for E7221Dave Airlie
2008-01-22Correct vblank count valueJesse Barnes
The frame count registers don't increment until the start of the next frame, so make sure we return an incremented count if called during the actual vblank period.
2008-01-22i915 irq fixesJesse Barnes
Ack the IRQs correctly (PIPExSTAT first followed by IIR). Don't read vblank counter registers on disabled pipes (might hang otherwise). And deal with flipped pipe/plane mappings if present.
2008-01-22Merge branch 'master' into vblank-rework, including mach64 supportJesse Barnes
Conflicts: linux-core/drmP.h linux-core/drm_drv.c shared-core/i915_drv.h shared-core/i915_irq.c shared-core/mga_irq.c shared-core/radeon_irq.c shared-core/via_irq.c Mostly trivial conflicts. mach64 support from Mathieu Bérard.
2008-01-22Revert "Fix pipe<->plane mapping vs. vblank handling (again)"Dave Airlie
This reverts commit bfc29606e4a818897eebca46a5e23bbe7bc3ce25. This regresses i915 here for me I can't get greater than 0.333 fps with gears
2008-01-21nouveau: don't forget NV80.Stephane Marchesin
2008-01-21nouveau: new card family for old card designs.Stephane Marchesin
2008-01-18Made radeon_ms not always compileJakob Bornecrantz
2008-01-17i915: fix invalid opcode exception on cpus without clflushKyle McMartin
i915_flush_ttm was unconditionally executing a clflush instruction to (obviously) flush the cache. Instead, check if the cpu supports clflush, and if not, fall back to calling wbinvd to flush the entire cache. Signed-off-by: Kyle McMartin <kmcmartin@redhat.com>
2008-01-17Add additional explanation of DRM_BO_FLAG_CACHED_MAPPED before I forget again.Eric Anholt
2008-01-15i915: Add chipset id for Intel Integrated Graphics DeviceZhenyu Wang
This adds new chipset id in drm. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-01-15radeon_ms: use radeon connector type insted of drmJerome Glisse
2008-01-15radeon_ms: cope with lastest drm modesetting changeJerome Glisse
2008-01-15radeon_ms: add rom parsing & adapt codeJerome Glisse
Add rom (only combios for now) parsing and use informations retrieve instead of hardcoded table. Shuffle code around a bit.
2008-01-15Properly propagate the user-space fence flags.Thomas Hellstrom
This avoids a sync flush when user-space has already programmed and MI_FLUSH in the batchbuffer.
2008-01-15Define i915_compat.c upper_32_bits for kernels < 2.6.21Thomas Hellstrom
2008-01-15 this is to fix a deadloop in drm hang system issue.Zou Nan hai
(1 << bits) is an undefined value when bits == 32. gcc may generate 1 with this expression which will lead to an infinite retry loop in drm_ht_just_insert_please. Because of the different implement of hash_long, this issue is more frequenly see on 64 bit system
2008-01-14fixup i915 compat resource allocationDave Airlie
2008-01-14nouveau: make mem alloc debug a little more verbose.Stephane Marchesin
2008-01-11Fix for X axis panning problemJakob Bornecrantz
2008-01-11Panning now works without modesetJakob Bornecrantz
2008-01-11Updated the modedemo testJakob Bornecrantz
2008-01-11Added fixed misc framebuffer problemsJakob Bornecrantz
2008-01-11nv05: enable ctx/op methods, and ignore patch valid failures.Ben Skeggs
Yes, I'm quite aware "real" nv04 doesn't support this, hopefully the GPU will just ignore those PGRAPH_DEBUG_3 bits on that hw.
2008-01-10Updated test mode and added modedemoJakob Bornecrantz
2008-01-09fixup crtcinfo on modes from userspaceDave Airlie
2008-01-09add control node openDave Airlie
2008-01-09add internals for opening a control nodeDave Airlie
2008-01-09allow control getversionDave Airlie
2008-01-09add control ioctlsDave Airlie
2008-01-09drm: only call suspend/resume on control nodeDave Airlie
2008-01-08nouveau: AGP reset correction - don't touch FW bitStuart Bennett
2008-01-07nv50: more small changesBen Skeggs
2008-01-07nv50: oops, lost some state saving along the way somewhere.Ben Skeggs
xf86-video-nv will now work again after nouveau.
2008-01-07nv50: hook up timer funcs...Ben Skeggs
2008-01-07nv50: abort on chips without ctx ucodeBen Skeggs
2008-01-07nv50: some needed ctx valsBen Skeggs
2008-01-07nv50: use dummy page in gart tablesBen Skeggs
Just to be safe, we don't really know exactly how the tables work yet, so we can't be certain there's a way to say "page not present".
2008-01-07nv50: some cleanups + small changesBen Skeggs
2008-01-07Nouveau: ppc oops.Stephane Marchesin
2008-01-07Nouveau: move PPC bios copy to firstopen.Stephane Marchesin
2008-01-06nouveau: Add ctx_voodoo for NV86Jeremy Kolb
2008-01-05drm: One forgotten rename of 'mask' to 'proposed_flags'.Pekka Paalanen
Due to commit d1187641d64f442968a3b9ea6a19de6cdd45acd4.
2008-01-04drm: add initial support for a drm control device nodeDave Airlie
2008-01-04crtc: fixup allocation sizeDave Airlie
2008-01-04via: add P4M900 pci id.Xavier Bachelot
bug 12108
2008-01-04drm: move drm_head to drm_minor and fix up usersDave Airlie
2008-01-04[PATCH] nouveau: reset AGP on init for < nv40Stuart Bennett
This is necessary for AGP to work after running bios init scripts on nv3x, and is seen in mmio traces of all cards (nv04-nv4x) I'm not making the equivalent change to nv40_mc.c, as early cards (6200, 6800gt) use the 0x000018XX PBUS and later cards use the 0x000880XX PBUS and I don't know the effects of using the wrong one
2008-01-04[PATCH] nouveau: Fix nv20/30 context loadingStuart Bennett
Don't set the context as valid until it has been loaded
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