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2008-06-06[intel] Allocate hardware status page at driver load timeKeith Packard
I couldn't get the re-allocated HWS to work on my 965GM, so I just gave up and made it persist across the lifetime of the driver instead.
2008-06-06Ignore X server provided mmio addressKeith Packard
2008-06-06[intel-gem] Dump error status on wait_request failureKeith Packard
2008-06-05radeon: Restore software interrupt on resume.Dennis Kasprzyk
Fixes performance drop after suspend/resume on some systems.
2008-06-05Add a function to bufmgr_fake to evict all buffers in the GTT.Eric Anholt
This will be used by the X Server for VT switch.
2008-06-03Drop struct_mutex while waiting in drm_client_lock_takeKeith Packard
struct_mutex cannot be held while blocking on DRM lock.
2008-06-03Fix libdrm to actually include the new code instead of just building it.Eric Anholt
2008-06-03Fix and hook up bufmgr code to the build.Eric Anholt
2008-06-03Import bufmgr code to libdrm. Not yet hooked up to the build.Eric Anholt
2008-06-03vblank: Don't wait or update the counter while the CRTC is supposedly disabled.Michel Dänzer
Without kernel modesetting, this requires cooperation of the userspace modesetting driver. We may have to leave the vblank interrupt enabled otherwise to avoid problems.
2008-06-03vblank: Clean up compensation for spurious wraparounds of driver counter.Michel Dänzer
Only compensate when the driver counter actually appears to have moved backwards. The compensation deltas need to be incremental instead of absolute; drop the vblank_offset field and just use atomic_sub().
2008-06-03vblank: Special-case driver vblank counter going back by 1.Michel Dänzer
Turns out the radeon driver is affected by the same problem that prompted i915 to revert to less useful counter flipping at the end of the vblank interval. In the long term, we can hopefully implement more reliable methods to achieve counter flipping at the beginning of vblank, but otherwise this should be an acceptable workaround.
2008-06-03vblank: Don't return current sequence number and time if interrupted by signal.Michel Dänzer
2008-06-03Revert "don't copy back if an error was returned."Michel Dänzer
This reverts commit 6671ad1917698b6174a1af314b63b3800d75248c. The vblank ioctl needs to update the userspace parameters when interrupted by a signal, which was prevented by this. Let's see if this breaks other ioctls...
2008-06-03drm: sg alloc should write back the handle to userspaceDave Airlie
2008-06-03drm/ati_pcigart: use proper page mapping functionDave Airlie
This should be pci_map_page not pci_map_single
2008-06-02[intel-gem] reloc_and_validate_object → object_bind_and_relocateKeith Packard
Just renaming this function and related parameters to match terminology used elsewhere in the driver.
2008-06-02[intel-gem] Propagate set_domain errors.Keith Packard
set_domain can block waiting for rendering to complete. If that process is interrupted by a signal, it can return -EINTR. Catch this error in all callers and correctly deal with the result.
2008-06-01[FreeBSD] Declare vblank_disable_fn callout MPSAFE.Robert Noland
2008-06-01[FreeBSD] Get rid of vbl_lock and re-use irq_lock.Robert Noland
2008-06-01[FreeBSD] Add symlink for radeon_microcode.hRobert Noland
2008-06-01[FreeBSD] Call drm_vblank_cleanup during irq uninstallRobert Noland
I needed to re-arrange some functions for this. Also needed to call DRM_SPINUNINIT on the vbl_lock during cleanup.
2008-05-30RADEON: fix typo in last commitAlex Deucher
2008-05-30Merge commit 'origin/master' into drm-gemEric Anholt
Conflicts: linux-core/Makefile.kernel shared-core/i915_drv.h shared-core/nouveau_state.c
2008-05-30[intel-gem] Only update obj->write_domain if we're actually changing it.Eric Anholt
The problem was revealed where on 965, the display list vertex buffer would see: create -> (CPU, CPU) set_domain (CPU, CPU) -> (CPU, CPU) set_comain (CPU, 0) -> (CPU, 0) (no clflush occurred) execbuf (GPU, 0) -> (CPU+GPU, 0) (still no clflush) instead of: create -> (CPU, CPU) set_domain (CPU, CPU) -> (CPU, CPU) set_comain (CPU, 0) -> (CPU, CPU) execbuf (GPU, 0) -> (CPU+GPU, 0) (clflushed)
2008-05-30[intel-gem] Add an option to check GTT versus CPU coherency at execbuf time.Eric Anholt
2008-05-30r500: attempt to make AGP work by programming agp base in the MC correctlyDave Airlie
2008-05-29[intel-gem] Write the presumed_offset back out after updating it.Eric Anholt
Otherwise, 965 constant state buffers get re-relocated every exec. Ouch.
2008-05-28[intel-gem] Clean up active/inactive/flushing list debugging.Keith Packard
2008-05-28radeon: split microcode out into a separate header file.Dave Airlie
2008-05-27[intel-gem] Replace idlelock usage with real lock acquisition.Eric Anholt
2008-05-28i915: fix BSD bh, DRI2 not uses anywhere elseDave Airlie
2008-05-28radeon: bump release date/version for r500 3D supportDave Airlie
2008-05-27RADEON: add get_param for number of GB pipesAlex Deucher
2008-05-27[BSD] Move unlock in drm_vm.c from accidental platform #ifdeffing.Owain Ainsworth
Also remove an unreachable unlock.
2008-05-27[BSD] Fix lock leak in drm_update_draw malloc failure path.Owain Ainsworth
2008-05-27[BSD] Fix lock leaks in error paths in drm_bufs.c.Owain Ainsworth
2008-05-27[BSD] Remove superfluous recursive locking in drm_add_magic.Owain Ainsworth
2008-05-27[i915] Fix typo in (unused) START_ADDR definition.Jie Luo
2008-05-27[FreeBSD] Add vblank-rework support and get drivers building.Robert Noland
The i915 driver now works again.
2008-05-27[FreeBSD] Convert from drm_device_t to struct drm_device for consistency.Eric Anholt
2008-05-26[intel-gem] Must hold DRM lock while setting object domainKeith Packard
Object domain transfer can involve adding flush ops to the request queue, and so the DRM lock must be held to avoid having the X server smash pointers badly.
2008-05-26[i915] leave interrupts masked off when not in use.Keith Packard
The interrupt enable register cannot be used to temporarily disable interrupts, instead use the interrupt mask register. Note that this change means that a pile of buffers will be left stuck on the chip as the final interrupts will not be recognized to come and drain things.
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
This new ioctl returns whether re-using the buffer would force a wait.
2008-05-25[intel-gem] Compute npages instead of nbytes in flush_pwriteKeith Packard
i915_gem_flush_pwrite optimizes short writes to the buffer by clflushing only the modified pages, but it was miscomputing the number of pages.
2008-05-25[intel-gem] replace call to jiffies_to-msec with simple inlineKeith Packard
2008-05-22[intel-gem] Encourage multiple caches to hold read dataKeith Packard
When reading from multiple domains, allow each cache to continue to hold data until writes occur somewhere. This is done by first leaving the read_domains alone at bind time (presumably the CPU read cache contains valid data still) and then in set_domain, if no write_domain is specified, the new read domains are simply merged into the existing read domains. A huge comment was added above set_domain to explain how things are expected to work.
2008-05-22[gem] Use CPU domain for new or pageable objectsKeith Packard
Newly allocated objects need to be in the CPU domain as they've just been cleared by the CPU. Also, unmapping objects from the GTT needs to put them into the CPU domain, both to flush rendering as well as to ensure that any paging action gets flushed before we remap to the GTT.
2008-05-22[intel-gem] Force ring retire by emiting flush before user-interrupt.Keith Packard
Commands in the ring are parsed and started when the head pointer passes by them, but they are not necessarily finished until a MI_FLUSH happens. This patch inserts a flush after the execbuffer (the only place a flush wasn't already happening).
2008-05-22[intel] Add debug code to verify the cached ring tail pointer.Keith Packard
Recording the tail pointer in a local variable improves performance, but if someone messes up and fails to reload at the right time, the driver will write commands to the wrong part of the ring and scramble execution badly. This change (available by setting I915_RING_VALIDATE to 1) checks to make sure the cached tail pointer matches the hardware tail pointer at each ring buffer addition, calling BUG_ON when that's not true.