| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-07-13 | applied patch from Ian Romanick fixing PCI DMA object creation code | Arthur Huillet | |
| 2007-07-13 | Merge commit 'public/master' | Arthur Huillet | |
| 2007-07-13 | now attempting to create PCI object only when there is a pci_heap | Arthur Huillet | |
| 2007-07-13 | now attempting to create PCI object only when there is a pci_heap | Arthur Huillet | |
| 2007-07-13 | nouveau: nuke internal typedefs, and drm_device_t use. | Ben Skeggs | |
| 2007-07-13 | nouveau: unbreak AGP | Ben Skeggs | |
| 2007-07-12 | nouveau: mem_alloc() returns offsets, not absolute addresses now. | Ben Skeggs | |
| 2007-07-12 | nouveau: nuke left over debug message | Ben Skeggs | |
| 2007-07-12 | nouveau: separate region_offset into map_handle and offset. | Ben Skeggs | |
| 2007-07-12 | fixed object creation code to not Oops on 64bits, worked around memalloc not ↵ | Arthur Huillet | |
| working on 64bit for PCIGART | |||
| 2007-07-11 | NV50 will not attempt to use PCIGART now | Arthur Huillet | |
| 2007-07-11 | fixed bug that prevented PCIE cards from actually using PCIGART - NV50 will ↵ | Arthur Huillet | |
| probably still have a problem | |||
| 2007-07-11 | nouveau/nv50: G80 fixes. | Ben Skeggs | |
| Again, no hardware, so no idea if it'll even work yet. I understand how the PRAMIN setup works now, un-hardcoding stuff will come "RealSoonNow(tm)". | |||
| 2007-07-11 | nouveau: Some checks on userspace object handles. | Ben Skeggs | |
| 2007-07-11 | Merge branch 'master' into cleanup | Dave Airlie | |
| Conflicts: libdrm/xf86drm.c linux-core/drm_bo.c linux-core/drm_fence.c | |||
| 2007-07-11 | Added support for PCIGART for PCI(E) cards. Bumped DRM interface patchlevel. | Arthur Huillet | |
| 2007-07-11 | Made drm_sg_alloc accessible from inside the DRM - drm_sg_alloc_ioctl is the ↵ | Arthur Huillet | |
| ioctl wrapper | |||
| 2007-07-09 | nouveau: Allocate mappable VRAM for notifiers.. | Ben Skeggs | |
| 2007-07-09 | nouveau: Don't be so strict on <NV50 | Ben Skeggs | |
| 2007-07-09 | nouveau: Avoid oops | Ben Skeggs | |
| Turns out lastclose() gets called even if firstopen() has never been... | |||
| 2007-07-09 | nouveau/nv50: Initial channel/object support | Ben Skeggs | |
| Should be OK on G84 for a single channel, multiple channels *almost* work. Untested on G80. | |||
| 2007-07-09 | nouveau: enable reporting for all PFIFO/PGRAPH irqs | Ben Skeggs | |
| 2007-07-09 | nouveau: rewrite gpu object code | Ben Skeggs | |
| Allows multiple references to a single object, needed to support PCI(E)GART scatter-gather DMA objects which would quickly fill PRAMIN if each channel had its own. Handle per-channel private instmem areas. This is needed to support NV50, but might be something we want to do on earlier chipsets at some point? Everything that touches PRAMIN is a GPU object. | |||
| 2007-07-03 | Use idr_replace trick to eliminate struct drm_ctx_sarea_list. | Kristian Høgsberg | |
| 2007-07-03 | Don't take dev->struct_mutex twice in drm_setsareactx. | Kristian Høgsberg | |
| 2007-07-03 | One more spinlock initializer cleanup. | Michel Dänzer | |
| 2007-07-03 | Simplification for previous commit. | Michel Dänzer | |
| Dave Airlie pointed out on IRC that idr_replace lets us know if the ID hasn't been allocated, so we don't need a special pointer value for allocated IDs that don't have valid information yet. | |||
| 2007-07-03 | Restore pre-idr semantics for drawable information. | Michel Dänzer | |
| There's a difference between a drawable ID not having valid drawable information and not being allocated at all. Not making the distinction would break i915 DRM swap scheduling with older X servers that don't push drawable cliprect information to the DRM. | |||
| 2007-07-02 | Fix must-check warnings and implement a few error paths. | Kristian Høgsberg | |
| 2007-07-02 | Drop drm_drawable_list and add drm_drawable_info directly to the idr. | Kristian Høgsberg | |
| 2007-06-29 | Avoid hitting BUG() for kernel-only fence objects. | Thomas Hellstrom | |
| 2007-06-29 | Fence object reference / dereference cleanup. | Thomas Hellstrom | |
| Buffer object dereference cleanup. Add a struct drm_device member to fence objects: This can simplify code, particularly in drivers. | |||
| 2007-06-29 | nouveau: small RAMFC cleanups | Ben Skeggs | |
| 2007-06-28 | nouveau: Hack around possible Xv blit adaptor breakage | Ben Skeggs | |
| 2007-06-28 | nouveau/nv10: Fix earlier NV1x chips | Ben Skeggs | |
| Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET. | |||
| 2007-06-28 | nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit | Ben Skeggs | |
| 2007-06-28 | nouveau: simplify PRAMIN access | Ben Skeggs | |
| 2007-06-28 | nouveau: name some regs | Ben Skeggs | |
| 2007-06-28 | nouveau/nv50: skeletal backend | Ben Skeggs | |
| 2007-06-28 | nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7) | Ben Skeggs | |
| For various reasons, this ioctl was a bad idea. At channel creation we now automatically create DMA objects covering available VRAM and GART memory, where the client used to do this themselves. However, there is still a need to be able to create DMA objects pointing at specific areas of memory (ie. notifiers). Each channel is now allocated a small amount of memory from which a client can suballocate things (such as notifiers), and have a DMA object created which covers the suballocated area. The NOTIFIER_ALLOC ioctl exposes this functionality. | |||
| 2007-06-28 | nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks | Ben Skeggs | |
| 2007-06-26 | More 64-bit padding. | Thomas Hellstrom | |
| 2007-06-26 | Add support SiS based XGI chips to SiS DRM. | Ian Romanick | |
| 2007-06-25 | nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303 | Ben Skeggs | |
| 2007-06-24 | nouveau: kill some dead code | Ben Skeggs | |
| 2007-06-24 | nouveau: NV04/NV10/NV20 PGRAPH engtab functions | Ben Skeggs | |
| NV04/NV10 load_context()/save_context() are stubs. I don't know enough about how they work to implement them sanely. The "old" context_switch() code remains hooked up, so it shouldn't break anything. NV20 will probably break if load_context() works. No inital context values are filled in, so when the first channel is created PGRAPH will probably end up having its state zeroed. Some setup from nv20_graph_init() will probably need to be moved to the per-channel context setup. | |||
| 2007-06-24 | nouveau: NV3X PGRAPH engtab functions | Ben Skeggs | |
| 2007-06-24 | nouveau: NV1X/2X/3X PFIFO engtab functions | Ben Skeggs | |
| Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size. | |||
| 2007-06-24 | nouveau: NV04 PFIFO engtab functions | Ben Skeggs | |
| 2007-06-24 | nouveau: NV4X PGRAPH engtab functions | Ben Skeggs | |
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index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
| summaryrefslogtreecommitdiff |