| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2008-05-13 | RS4xx: separate out RS400 and RS480 IGP chips | Alex Deucher | |
| RS400 (intel based IGP) and RS480 (AMD based IGP) have different MC and GART setups. Currently we only support RS480. | |||
| 2008-05-12 | [GEM] Update testcases for new API. | Eric Anholt | |
| 2008-05-12 | [GEM] Typo (and thinking) fixes in drm-gem.txt and doxygen. | Eric Anholt | |
| 2008-05-12 | [intel] Minor kludge -- wait for the ring to be nearly empty before queuing | Keith Packard | |
| No need to fill the ring that much; wait for it to become nearly empty before adding the execbuffer request. A better fix will involve scheduling ring insertion in the irq handler. | |||
| 2008-05-12 | [intel] When polling for ring space, sleep for a lot longer (10ms) | Keith Packard | |
| If the ring is full, the engine will surely be running for more than 10ms. | |||
| 2008-05-12 | [gem] Set write domain to CPU when doing pwrite. | Keith Packard | |
| Leave the flush call in place, which can fix domains up if necessary. | |||
| 2008-05-12 | [gem] Clarify use of explicit domain control. Remove Gen3 from I-cache usage. | Keith Packard | |
| 2008-05-12 | RADEON: fix copy/pasto in last commit | Alex Deucher | |
| 2008-05-12 | R3/4/5: init pipe setup in drm | Alex Deucher | |
| Similar (broken) code in mesa needs to be removed | |||
| 2008-05-12 | RADEON: cleanup radeon_do_engine_reset() | Alex Deucher | |
| 2008-05-12 | R300+: fixup pixcache flush | Alex Deucher | |
| 2008-05-12 | RS4xx: fix MCIND index mask | Alex Deucher | |
| 2008-05-12 | RADEON: write AGP_BASE_2 on chips that support it | Alex Deucher | |
| 2008-05-12 | R300+: fixup PURGE/FLUSH macros | Alex Deucher | |
| 2008-05-12 | Radeon IGP: merge RS4xx/RS6xx gart setup | Alex Deucher | |
| 2008-05-12 | Radeon IGP: wrap MCIND access | Alex Deucher | |
| first step in merging rs4xx/rs6xx gart setup | |||
| 2008-05-12 | Radeon IGP: clean up registers and magic numbers | Alex Deucher | |
| 2008-05-11 | [GEM] Make pread/pwrite manage memory domains. No luck with movnti though. | Keith Packard | |
| pread and pwrite must update the memory domains to ensure consistency with the GPU. At some point, it should be possible to avoid clflush through this path, but that isn't working for me. | |||
| 2008-05-10 | [intel-GEM] exec list can contain pinned, lru cannot. | Keith Packard | |
| The exec list contains all objects, in order of use. The lru list contains only unpinned objects ready to be evicted. This required two changes -- the first was to not migrate pinned objects from exec to lru, the second was to search for the first unpinned object in the exec list when doing eviction. | |||
| 2008-05-10 | Merge commit 'anholt/drm-gem' into drm-gem | Keith Packard | |
| 2008-05-10 | [GEM] Add drm-gem.txt | Keith Packard | |
| Add some API and implementation documentation for GEM. | |||
| 2008-05-10 | [intel-GEM] Clean up GEM ioctl naming. | Keith Packard | |
| Rename 'validate_entry' to 'exec_object', then clean up some field names in structures (renaming buffer_offset to just offset, for example). | |||
| 2008-05-09 | GEM: Fix arguments to drm_memrange_init so we don't exceed our allocation. | Eric Anholt | |
| It takes (offset, size), not (offset, end). | |||
| 2008-05-09 | GEM: Separate the LRU into execution list and LRU list. | Eric Anholt | |
| Now, the LRU list has objects that are completely done rendering and ready to kick out, while the execution list has things with active rendering, which have associated cookies and reference counts on them. | |||
| 2008-05-09 | GEM: Clear obj_priv->agp_mem when we free it. | Eric Anholt | |
| Still managing to get something wrong with this, oopsing down in agp. | |||
| 2008-05-09 | GEM: Avoid leaking refs on target objects on presumed offset success. | Eric Anholt | |
| 2008-05-09 | [gem] API cleanup. allocate->create unreference->close name->flink | Keith Packard | |
| Make the API names a bit more consistent. | |||
| 2008-05-08 | [i915] clean up whinging from checkpatch.pl | Keith Packard | |
| 2008-05-08 | Clean up whinging from checkpatch.pl in drm_gem.c | Keith Packard | |
| Whitespace changes, a few too-long-lines and some extra braces. | |||
| 2008-05-08 | GEM: Fix oops on NULL dereference when we try clflushing when we don't need to. | Eric Anholt | |
| 2008-05-08 | [intel-gem] Move domains to relocation records. add set_domain ioctl. | Keith Packard | |
| Domain information is about buffer relationships, not buffer contents. That means a relocation contains the domain information as it knows how the source buffer references the target buffer. This also adds the set_domain ioctl so that user space can move buffers to the cpu domain. | |||
| 2008-05-07 | GEM: fix testcases for new ioctl args. | Eric Anholt | |
| 2008-05-07 | Apply a few stylistic cleanups to match kernel code. | Arjan van de Ven | |
| 2008-05-07 | GEM: Wait for existing rendering to complete before writing relocation data. | Eric Anholt | |
| This should already have been generally safe since we don't change contents and put in new relocations between execbufs, so if we were writing in a new relocation then we'd already waited rendering to complete when we moved the target of the relocation. However, doing the right thing will be required if we do buffer reuse. | |||
| 2008-05-07 | GEM: Extend cache domain stuff for 965. | Eric Anholt | |
| One of our MI_FLUSH bits is reserved on 965, being always implied, and there's a vertex cache that was forgotten. | |||
| 2008-05-07 | drm: nopage compat fixup for drm_vm | Dave Airlie | |
| The kernel has removed nopage so move the old nopage codepaths into a compat vm file and switch to using the fault paths. nopfn is on its way out in the future also, so we should switch to using fault for that path as well soon | |||
| 2008-05-06 | [intel-GEM] ref count objects in gtt-lru. | Keith Packard | |
| If objects on the lru aren't ref counted, they'll get pulled from the gtt as soon as they are freed. This change does cause objects to get stuck in the gtt until they're forced out by new requests. The lru should get cleaned when the irq occurs. | |||
| 2008-05-06 | [intel-GEM] Add memory domain support. | Keith Packard | |
| Memory domains allow the kernel to track which caches to flush and how to move objects before buffer execution. | |||
| 2008-05-06 | Merge commit 'anholt/drm-gem' into drm-gem | Keith Packard | |
| 2008-05-06 | Start coding up memory domains | Keith Packard | |
| 2008-05-06 | GEM: Use irq-based fencing rather than syncing and evicting every exec. | Eric Anholt | |
| 2008-05-06 | GEM: Skip relocation if presumed offset matches. | Eric Anholt | |
| 2008-05-06 | GEM: Save the last ioremapped page for relocations in case we need it again. | Eric Anholt | |
| 2008-05-05 | Dump last batch buffer when hardware lockup is detected. | Keith Packard | |
| 2008-05-05 | Monitor ACTHD register while polling for idle ring. | Keith Packard | |
| When batch buffers are executing, the ring may be stuck for a long time. Monitor the ACTHD pointer which will show if the execution engine is actually hung. | |||
| 2008-05-05 | Unlock pages right after getting them. | Keith Packard | |
| pages come back from find_or_create_page locked, but must not stay locked for long. Unlock them immediately instead of waiting until we're done with them to avoid deadlock when applications try to touch them. | |||
| 2008-05-05 | Merge commit 'anholt/drm-gem' into drm-gem | Keith Packard | |
| Conflicts: linux-core/i915_gem.c | |||
| 2008-05-05 | GEM: Replace drm_memrange_for_each with just evicting what we brought in. | Eric Anholt | |
| I was wrong about how the data structure worked, and didn't care to fix it to support debugging code. | |||
| 2008-05-05 | Remove some debug messages. | Keith Packard | |
| 2008-05-05 | Add object base to relocation store address. | Keith Packard | |
| The relocated value was being written to the wrong location, missing the object base address. | |||
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index : renesas/drm.git | |
| libdrm, cloned from git://anongit.freedesktop.org/mesa/drm | Laurent Pinchart |
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