Age | Commit message (Collapse) | Author |
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They are not unnecessary since the kernel's the only thing touching the ring.
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This requires that the X Server use the execbuf interface for buffer
submission, as it no longer has direct access to the ring. This is
therefore a flag day for the gem interface.
This also adds enter/leavevt ioctls for use by the X Server. These would
get stubbed out in a modesetting implementation, but are required while
in an environment where the device's state is only managed by the DRM while
X has the VT.
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GART setup appears to work the same as RS480 chips.
Also RC4xx chips are actually RS400 based, not RS480 based.
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Reported by vehemens
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This is mostly just a diff reduction with the linux version.
I'm not convinced that it will make anything better.
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This seems to be the key to getting at least some radeon
cards working. Most, if not all drivers need it enabled,
so just request it once the driver has attached.
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They are recursive and causing panics with witness enabled.
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The driver can know what hardware requires MI_BATCH_BUFFER vs
MI_BATCH_BUFFER_START; there's no reason to let user mode configure this.
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Without the user IRQ running constantly, there's no wakeup when the ring
empties to go retire requests and free buffers. Use a 1 second timer to make
that happen more often.
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This goes with the other hardware status page patch.
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Instead of throttling and execbuffer time, have the application ask to
throttle explicitly. This allows the throttle to happen less often, and
without holding the DRM lock.
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Place the buffer reuse links right into the dri_bo_gem object.
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The code was discarding the dri_bo_gem structure and saving only the kernel
handle. This lost the mmap address, causing pain when the next buffer user
wanted to map the buffer.
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I couldn't get the re-allocated HWS to work on my 965GM, so I just gave up
and made it persist across the lifetime of the driver instead.
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Fixes performance drop after suspend/resume on some systems.
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This will be used by the X Server for VT switch.
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struct_mutex cannot be held while blocking on DRM lock.
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Without kernel modesetting, this requires cooperation of the userspace
modesetting driver. We may have to leave the vblank interrupt enabled otherwise
to avoid problems.
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Only compensate when the driver counter actually appears to have moved
backwards.
The compensation deltas need to be incremental instead of absolute; drop the
vblank_offset field and just use atomic_sub().
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Turns out the radeon driver is affected by the same problem that prompted i915
to revert to less useful counter flipping at the end of the vblank interval. In
the long term, we can hopefully implement more reliable methods to achieve
counter flipping at the beginning of vblank, but otherwise this should be an
acceptable workaround.
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This reverts commit 6671ad1917698b6174a1af314b63b3800d75248c.
The vblank ioctl needs to update the userspace parameters when interrupted by
a signal, which was prevented by this. Let's see if this breaks other ioctls...
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This should be pci_map_page not pci_map_single
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Just renaming this function and related parameters to match terminology used
elsewhere in the driver.
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set_domain can block waiting for rendering to complete. If that process is
interrupted by a signal, it can return -EINTR. Catch this error in all
callers and correctly deal with the result.
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I needed to re-arrange some functions for this.
Also needed to call DRM_SPINUNINIT on the vbl_lock during cleanup.
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Conflicts:
linux-core/Makefile.kernel
shared-core/i915_drv.h
shared-core/nouveau_state.c
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The problem was revealed where on 965, the display list vertex buffer would see:
create -> (CPU, CPU)
set_domain (CPU, CPU) -> (CPU, CPU)
set_comain (CPU, 0) -> (CPU, 0) (no clflush occurred)
execbuf (GPU, 0) -> (CPU+GPU, 0) (still no clflush)
instead of:
create -> (CPU, CPU)
set_domain (CPU, CPU) -> (CPU, CPU)
set_comain (CPU, 0) -> (CPU, CPU)
execbuf (GPU, 0) -> (CPU+GPU, 0) (clflushed)
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