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Disable page saving for GPU read-only TTMs.
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NO_EVICT buffers.
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(Alan Hourihane)
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Also, power cycle PGRAPH when resetting AGP -- it seems to fix problems encountered by p0g on nv25
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My 965GM gets interrupts stuck when using the old PIPE_VBLANK interrupt.
Switch to the PIPE_EVENT interrupt mechanism, and set the PIPE*STAT
registers to use START_VBLANK on 965 and VBLANK on previous chips.
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Will hopefully work a bit better than previous code, which depended on
knowing the channel's most recent PUT value. Some chips always return
0 on reading these regs, and currently userspace is the only other entity
which knows the value.
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Not only was this entirely pointless, it actually causes my NV30GL to
die randomly when channels are destroyed.
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modprobe can be run with dropped capabilities we still want the kernel bos
to work.
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This patch fixes bits of the DRM so to make the radeon DRI work on
non-cache coherent PCI DMA variants of the PowerPC processors.
It moves the few places that needs change to wrappers to that
other architectures with similar issues can easily add their
own changes to those wrappers, at least until we have more useful
generic kernel API.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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this adds something to say the kernel initialised the memory region not
the userspace. and blocks userspace from deallocating kernel areas
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taken from modesetting branch but could be useful outside it.
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Rip out the whole head thing and replace it with an idr and drm_minor
structure.
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writting relocations, otherwise the GPU probably sees some
inconsistent data. Fix fd.o bug#14656
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These are all about the page directory (pointers to pages) rather than the
actual pages backing the allocation.
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This broke the results when you're trying to check if a buffer you dispatched
some time ago is done being rendered from.
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to leap it's vblank count a huge value.
This will stall some applications that switch video mode if vblank_mode is set to a non zero value in drirc.
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PCI- or high memory.
This is substantially more efficient than drm_bo_kmap,
since the mapping only lives on a single processor.
Unmapping is done use kunmap_atomic(). Flushes only a single tlb() entry.
Add a support utility int drm_bo_pfn_prot() that returns the
pfn and desired page protection for a given bo offset.
This is all intended for relocations in bound TTMS or vram.
Mapping-accessing-unmapping must be atomic, either using preempt_xx() macros
or a spinlock.
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PCI- or high memory.
This is substantially more efficient than drm_bo_kmap,
since the mapping only lives on a single processor.
Unmapping is done use kunmap_atomic(). Flushes only a single tlb() entry.
Add a support utility int drm_bo_pfn_prot() that returns the
pfn and desired page protection for a given bo offset.
This is all intended for relocations in bound TTMS or vram.
Mapping-accessing-unmapping must be atomic, either using preempt_xx() macros
or a spinlock.
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In particular -EAGAINs, which should be common during Xserver operation.
Also handle the fence creation failure case.
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Texture uploads could hit the blitter coordinate limit, adjust the texture
offset when uploading the pieces. Make sure to check the end address of the
upload too.
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Fixes resume from hibernate in some configurations.
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Thanks to Todd Merrill for pointing it out.
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This matches the changes in mesa to use the system drm includes
for the definitions of the drm ioctl structs.
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This fixes at least two problems:
* The vblank_disable_fn timer callback could get called after the DRM was
de-initialized, e.g. on X server shutdown.
* Leak of vblank related resources when disabling and re-enabling the IRQ, e.g.
on an X server reset.
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fix i915 driver to use state for hibernate save avoidance.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Failing to preserve the MI_ARB_STATE register was causing FIFO underruns on
the VGA output on my HP 2510p after resume.
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