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2007-06-24nouveau: NV1X/2X/3X PFIFO engtab functionsBen Skeggs
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size.
2007-06-24nouveau: NV04 PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PGRAPH engtab functionsBen Skeggs
2007-06-24nouveau: NV4X PFIFO engtab functionsBen Skeggs
2007-06-24nouveau: split PFIFO/PGRAPH context creationBen Skeggs
2007-06-24nouveau: (mostly) hook up put_base againBen Skeggs
2007-06-24nouveau: prototype PFIFO/PGRAPH engtab APIBen Skeggs
2007-06-24nouveau: rename engtab functionsBen Skeggs
2007-06-22radeon: Acknowledge all interrupts we're interested in.Michel Dänzer
Failure to do so was probably the root cause of fd.o bug 11287.
2007-06-21r300: Synchronized the register defines file; documentation changes.Oliver McFadden
2007-06-21r300: Allow writes to R300_VAP_PVS_WAITIDLE.Oliver McFadden
2007-06-18r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1.Oliver McFadden
2007-06-18r300: Synchronized the register defines file again.Oliver McFadden
2007-06-18fix radeon setparam on 32/64 systems, harder.David Woodhouse
Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was to handle the fact that on i386, alignof(uint64_t)==4. Unfortunately, this handler was installed for _all_ 64-bit architectures, instead of only x86_64 and ia64. And thus it breaks 32-bit compatibility on every other arch, where 64-bit integers are aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode. Arnd has a cunning plan to use 'compat_u64' with appropriate alignment attributes according to the 32-bit ABI, but for now let's just make the compat_radeon_cp_setparam routine entirely disappear on 64-bit machines whose 32-bit compat support isn't for i386. It would be a no-op with compat_u64 anyway. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2007-06-15i915: Fix handling of breadcrumb counter wraparounds.Michel Dänzer
2007-06-15Fix i915 sequence mask.Thomas Hellstrom
2007-06-15Indentation fixes.Thomas Hellstrom
2007-06-15Fix refcounting / lock race.Thomas Hellstrom
Reported by Steve Wilkins / Michel Dänzer.
2007-06-15Locking fixes and instrumentation.Thomas Hellstrom
2007-06-13Fix drmMMUnlock / drmMMLock return values.Thomas Hellstrom
2007-06-13Make sure we read fence->signaled while spinlocked.Thomas Hellstrom
2007-06-13Fix fence object deref race.Thomas Hellstrom
2007-06-12Fix some obvious bugs.Thomas Hellstrom
2007-06-12Try to make buffer object / fence object ioctl args 64-bit safe.Thomas Hellstrom
Introduce tile members for future tiled buffer support. Allow user-space to explicitly define a fence-class. Remove the implicit fence-class mechanism. 64-bit wide buffer object flag member.
2007-06-10use krh's idr mods to remove lists from idr codeDave Airlie
2007-06-08r300: Added the CP maximum fetch size and ring rptr update variables.Oliver McFadden
2007-06-07oops must fix this properly at some pointDave Airlie
2007-06-07drm: fix radeon setparam alignment issues on 32/64-bitDave Airlie
2007-06-07radeon: PCIGART memory is Can't map aperture as well there is oneDave Airlie
on the CPU.... with this my indirect buffers at least start to live.. (cherry picked from commit 699cd9fc6c3794856f7e602088c77d0dfc11a122)
2007-06-05r300: Small correction to the previous commit.Oliver McFadden
2007-06-05r300: Document more of the RADEON_RBBM_STATUS register.Alex Deucher
2007-06-05Add support for the G33, Q33, and Q35 chipsets.Wang Zhenyu
These require that the status page be referenced by a pointer in GTT, rather than phsyical memory. So, we have the X Server allocate that memory and tell us the address, instead.
2007-06-05set start to gart_vm_start at leastDave Airlie
2007-06-05add wbinvd callsDave Airlie
2007-06-05remove include of linux ioctl32.h from drm driversDave Airlie
2007-06-05invalidate gart tlb on PCIE after table changeDave Airlie
2007-06-05take the lock earlier in ttmtestDave Airlie
2007-06-05complete PCIE backend for ttmDave Airlie
ttm test runs with it at least, needs to do more testing on it
2007-06-05WIP cleanupDave Airlie
2007-06-05cleanup pcigart ttm for new backend layoutDave Airlie
2007-06-05Merge branch 'origin' into radeon-ttmDave Airlie
Conflicts: shared-core/radeon_drv.h
2007-06-04nouveau: fix RAMHT wrappingMaurice van der Pot
2007-06-03radeon: refine irq acking for vbl on crtc 2Dave Airlie
2007-06-03Revert "drm: add new drm_wait_on function to replace macro"root
This reverts commit 6e860d08d0f5b1e9a2d711aaf9fd6b982aa8039e. As I said not a good plan - this macro will have to stay for now, trying to do the vbl code with the inline was a bit messy - may need specialised drm wait on functions
2007-06-03Revert "move i915 to new drm_wait_on function"root
This reverts commit feb68037784ac09e333a321d294fdb2d8c57a4c8. This was a bad idea, the macro is actually a bit harder to convert to a static for the other use cases
2007-06-03radeon: add support for vblank on crtc2Dave Airlie
This add support for CRTC2 vblank on radeon similiar to the i915 support
2007-06-01drm: fixup initialisation of list heads and idrDave Airlie
2007-06-01WIP more code for radeonDavid Airlie
2007-05-31i915: Add support for 945GME chipWang Zhenyu
2007-05-31i915: Add support for 965GME/GLE chip.Wang Zhenyu
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