summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2007-03-24vm: cleanup drm_vm.c along lines of cleanups queued for kernelDave Airlie
2007-03-23nouveau: rework nouveau_fifo_alloc() so the drm can create internal FIFOsBen Skeggs
2007-03-23cleanup more whitespace from ttm mergeDave Airlie
2007-03-23drm: remove second spinlock init for tasklet lockDave Airlie
2007-03-23nouveau: remove unused cruftBen Skeggs
2007-03-21nouveau: support multiple channels per client (breaks drm interface)Ben Skeggs
2007-03-20rename badly named defineDave Airlie
2007-03-19remove i830 referenceAlan Hourihane
2007-03-19Remove old i830 kernel driver.Alan Hourihane
2007-03-19more return values fixupDave Airlie
2007-03-19fixup return values in drm ioctlDave Airlie
2007-03-19more whitespace issuesDave Airlie
2007-03-19cleanup ioctl expansion codeDave Airlie
2007-03-19oops missing elseDave Airlie
2007-03-19make drm fops const from kernelDave Airlie
2007-03-19use ARRAY_SIZEDave Airlie
2007-03-19more tab/space conversionDave Airlie
2007-03-19whitespace cleanup pending a kernel mergeDave Airlie
2007-03-19clean up more of inline functions agp_remap/drm_lookup_mapDave Airlie
2007-03-18deinline agp_remap along lines of kernelDave Airlie
2007-03-18remove drm_lookup_map unused nowDave Airlie
2007-03-13r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; notOliver McFadden
enough information is known about them to be sure as to what the values mean.
2007-03-13Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT.Oliver McFadden
Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these values are really unknown; ideally more reverse engineering should be done to determine what these values mean and when they should be set.
2007-03-13nouveau: make sure cmdbuf object gets destroyedBen Skeggs
2007-03-13nouveau: associate all created objects with a channel + cleanupsBen Skeggs
2007-03-13nouveau: s/fifo/channel/Ben Skeggs
2007-03-13Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to eitherOliver McFadden
R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
2007-03-13Guess another unknown register used for R300 pacification.Oliver McFadden
2007-03-11nouveau: PUT,GET, not 2xPUTPatrice Mandin
2007-02-11Sync r300_reg.h from mesa driver. #10210Aapo Tahkola
2007-03-11replace instance of SA_SHIRQ with IRQF_SHAREDMaarten Maathuis
backwards compat added by airlied
2007-03-10Bump version patchlevel so it can be tested for new functionality.Michel Dänzer
2007-03-10Merge branch 'i915-pageflip'Michel Dänzer
2007-03-10i915: Only wait for pending flips before asynchronous flips again.Michel Dänzer
2007-03-09i915: Do not wait for pending flips on both pipes at the same time.Michel Dänzer
The MI_WAIT_FOR_EVENT instruction does not support waiting for several events at once, so this should fix the lockups with page flipping when both pipes are enabled.
2007-03-07nouveau: remove a hack that's not needed since the last interface change.Ben Skeggs
2007-03-07nouveau: ack PFIFO interrupts at PFIFO, not PMC.Ben Skeggs
2007-03-07Add via CX700.Thomas Hellstrom
2007-03-04radeon: make PCI GART aperture size variable, but making table size variableDave Airlie
This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0
2007-03-04ati: make pcigart code able to handle variable size PCI GART apertureDave Airlie
This code doesn't enable a variable aperture it just modifies the codebase to allow me fix it up later
2007-02-28i915: Eliminate dev_priv->current_page.Michel Dänzer
Always use dev_priv->sarea_priv->pf_current_page directly. This allows clients to modify it as well while they hold the HW lock, e.g. in order to sync pages between pipes.
2007-02-28i915: Only clean up page flipping when the last client goes away, not any one.Michel Dänzer
2007-02-28i915: Don't emit waits for pending flips before emitting synchronous flips.Michel Dänzer
The assumption is that synchronous flips are not isolated usually, and waiting for all of them could result in stalling the pipeline for long periods of time. Also use i915_emit_mi_flush() instead of an old-fashioned way to achieve the same effect.
2007-02-28i915: Fix test for synchronous flip affecting both pipes.Michel Dänzer
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING.
2007-02-27Fix Alpha domain/bus issueJay Estabrook
2007-02-26Fix build for 2.6.21-rc1.Thomas Hellstrom
The vm subsystem of 2.6.21 is fully compatible with the buffer object vm code.
2007-02-25drm: remove unnecessary NULL checks, and fix some indents..Jakob Bornecrantz
2007-02-22i915: Add support for scheduled buffer swaps to be done as flips.Michel Dänzer
Unfortunately, emitting asynchronous flips during vertical blank results in tearing. So we have to wait for the previous vertical blank and emit a synchronous flip.
2007-02-22Add DRM_VBLANK_FLIP.Michel Dänzer
Used to request that a scheduled buffer swap be done as a flip instead of a blit.