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The values are really going to continue meaning pipe, not plane, and that's
what they're called in the kernel copy of the header. Userland hasn't ever
made the switch to pipe!=plane, since userland checks are based on DRM
version, which is still stuck at 1.6. However, Mesa did start using
plane[AB] names, so provide a compat define.
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The code's in the linux kernel.
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Remember tiling mode values provided by appplications, and
record tiling mode when creating a buffer from another application. This
eliminates any need to ask the kernel for tiling values and also makes
reused buffers get the right tiling.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Signed-off-by: Keith Packard <keithp@keithp.com>
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Applications may actually care if the mapping operation failed, so when
it happens, return an error indication. errno is probably trashed by
fprintf though.
Signed-off-by: Keith Packard <keithp@keithp.com>
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The execbuffer ioctl returns ENOMEM when it fails to pin all of the buffers
in the GTT. This is usually caused by the DRM client attempting to use too
much memory in a single request. Dumping out the requested and available
memory values should help point out failures in the DRM code to catch over
commitments of this form.
Signed-off-by: Keith Packard <keithp@keithp.com>
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Add mode setting files to libdrm, including xf86drmMode.* and the new
drm_mode.h header. Also add a couple of tests to sanity check the
kernel interfaces and update code to support them.
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We wouldn't want some remaining 3D rendering to scribble on our batchbuffer.
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This reverts commit 6656db10551bbb8770dd945b6d81d5138521f208.
We really just want the libdrm and ioctl bits, not all the driver
stuff.
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we already have a 2.3.x version out there
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This function can also serve the role that the bo_wait_rendering did, when
write_enable is unset.
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I either messed up when I pulled these from a mmio-trace last time, or
the previous values didn't work on my card. Hopefully it's the former!
In any case, at least one of the original NV50 chipsets work now.
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Since the TTM type isn't upstream yet, we need to make sure libdrm uses
what the kernel uses, which is _DRM_GEM = 6.
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GEM is upstream, but TTM isn't, so _DRM_GEM needs to be 6, not 7.
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into modesetting-gem
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don't take the lock twice
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This reverts commit f46aba43329786c9b2776e82af31d90e1c67eae0.
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There seems to be an issue if we don't protect idr_pre with
the spinlock we use for idr operations.
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A small subset of CS need to be atomic (relocation+IB commit to
ring) right now, because of the way relocation are handled, we
need to protect the whole ioctl.
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BO are referenced once by reloc to make sure that they not destroyed
before we get a chance to flush the cmd stream, so we need to unreference
them once in cs submit or cs erase if cs i never submitted so bo can
be destructed.
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To keep record of bo activities and print them when necessary,
should help in tracking unbalanced ref/unref calls.
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Conflicts:
libdrm/Makefile.am
libdrm/intel/intel_bufmgr.h
libdrm/intel/intel_bufmgr_fake.c
libdrm/intel/intel_bufmgr_gem.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_irq.c
shared-core/radeon_cp.c
shared-core/radeon_drv.h
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Cast a couple of %llx args to unsigned long long.
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Add a drm_intel_gem_bo_map_gtt() function for mapping a buffer object
through the aperture rather than directly to its CPU cacheable memory.
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This is to fill in the gaps left by the removal of
the hotplug ioctls. And they also look better :)
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Relocation now consist of the following informations (in this order) :
handle buffer object handle identifier
start_offset start offset of first data of the buffer object used by the cs
end_offset end offset of last data of the buffer object used by the cs
read_domain read domain (either VRAM, or GTT as GPU is invalid for CS)
write_domain write domain (either VRAM, or GTT as GPU is invalid for CS)
flags flags used for further optimization (like discard previous
buffer content or forget buffer content after cs which can
help in avoiding moving content in or out)
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