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Add a nut vs hammer style chipset flush for the i8xx chipsets - reenable TTM
code paths
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This header file is shared across linux and bsd, but is not installed
for user space to access. It's the place to put prototypes and data
types that aren't platform or chipset specific, but still internal to
the drm.
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This reverts commit 2370ded79b4176d76cda1ec5f495fd33c2d566ed.
Err.. didn't mean for that to slip in :)
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Probably entirely pointless, but a simple change in any case.
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Fix from the X driver. Make sure the PLLs are enabled and not in VGA mode
before writing PIPE(A|B)CONF regs to avoid hangs or crashes.
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G33 detect seems missing with Jesse's suspend/resume patch.
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The size passing to memset is wrong.
Signed-off-by: Li Zefan <lizf@cn.fujitsu.com>
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Kernel "cleanfile" script run.
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This patch is originally from malc0_, but since it used some NV40_*
regs, I edited them into hex values with a comment.
This seems to correspond quite well with my own mmio-trace,
for the parts I cared to check.
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radeon code.
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