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This commit is a first step to dynamic alloc pgraph context on nv04, nv10.
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that appears when running glxgears and nouveau demo
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This makes sure each blit starts as early as possible, which may improve
texture upload performance in some cases.
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Building without optimization causes the drm module not to link correctly on
ppc.
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This avoid hardcoding pgraph_ctx size and potential buffer overflow.
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I should not have renamed this field.
I should not have renamed this field.
I should not have renamed this field.
On the plus side, it was at least binary compatible.
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now instead of locking up.
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incoming modes to current modelist.
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that for us.
other small cleanups.
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We may want to make the old i915 memory manager obsolete eventually, and in the
meantime the takedown causes problems on unload so remove it for now.
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The driver unload routine will want to remove register and SAREA maps, so don't
destroy the map hash before we get there.
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In the case of driver allocated buffers, there won't necessarily be a user list
associated with the buffer, so don't bug out on an empty list.
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Conflicts:
linux-core/drm_bo.c
linux-core/drm_fence.c
linux-core/drm_objects.h
shared-core/drm.h
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This is some code for nouveau that Ben Skeggs worked on, and also
fixes the naming (having class in a system header file == C++ keyword == bad plan)
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SDVO debug messages were incorrectly including severity prefixes in each print
rather than each unique line. Fix it up.
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Update IS_MOBILE macro to include new IS_I965GM test.
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Conflicts:
linux-core/drmP.h
linux-core/drm_bo.c
linux-core/drm_drv.c
linux-core/drm_objects.h
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
Mostly removing typedefs that snuck into the modesetting code and
updating to the latest TTM APIs. As of today, the i915 driver builds,
but there are likely to be problems, so debugging and bugfixes will
come next.
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Modify the TTM backend bind arguments.
Export a number of functions needed for driver-specific super-ioctls.
Add a function to map buffer objects from the kernel, regardless of where they're
currently placed.
A number of error fixes.
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This branch replaces the NO_MOVE/NO_EVICT flags to buffer validation with a
separate privileged ioctl to pin buffers like NO_EVICT meant before. The
functionality that was supposed to be covered by NO_MOVE may be reintroduced
later, possibly in a different way, after the superioctl branch is merged.
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One instance of unlocking a spinlock was converted incorrectly when this code
was fixed to build on BSD.
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Previously any ioctls that weren't explicitly listed in the compat ioctl
table would fail with ENOTTY. If the incoming ioctl number is outside the
range of the table, assume that it Just Works, and pass it off to drm_ioctl.
This make the fence related ioctls work on 64-bit PowerPC.
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This allows the xgi code to compile with older kernels.
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Someone should probably double-check my work here since this is the
first time I've touched drm_compat.[ch]
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We can figure out which pipe a given plane is mapped to by looking at the
display control registers instead of tracking it in a new SAREA private field.
If this becomes a performance problem, we could move to an ioctl based solution
by adding a new parameter for the DDX to set (defaulting to the old behavior if
the param was never set of course).
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This mod makes the SAREA track plane to pipe mappings and corrects the name of
the plane info variables (they were mislabeled as pipe info since until now all
code assumed a direct mapping between planes and pipes).
It also updates the flip ioctl argument to take a set of planes rather than
pipes, since planes are flipped while pipes generate vblank events.
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This fix some issues with more than one 3D fifo, but there still some "corruption" sometimes
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