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2008-07-07Add back flink, open and close ioctls.Kristian Høgsberg
They fell through the cracks in 86accbcb.
2008-07-07Merge commit 'origin/drm-gem' into ms-gemKristian Høgsberg
Conflicts: linux-core/drmP.h linux-core/drm_drv.c linux-core/drm_stub.c linux-core/i915_drv.c linux-core/i915_gem.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-07-07Use lowercase bool constants.Kristian Høgsberg
2008-06-24[intel] Get vblank pipe from irq_mask_reg instead of hardware enable regKeith Packard
With the interrupt enable/disable using only the mask register, it was wrong to use the enable register to detect which pipes had vblank detection turned on. Also, as we keep a local copy of the mask register around, and MSI machines smack the hardware during the interrupt handler, it is more efficient and more correct to use the local copy.
2008-06-24[intel] Create functions to enable/disable interruptsKeith Packard
This shares common code sequences for managing the interrupt register bits
2008-06-24Merge branch 'drm-gem' into drm-gem-965Keith Packard
2008-06-24[intel-gem] Include drm_compat.h to get kmap_atomic_prot_pfnKeith Packard
2008-06-24drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-24[intel-gem] Use I915_GEM_DOMAIN_GTT in dri_gem_bo_wait_rendering.Keith Packard
I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires clflushing the frame buffer.
2008-06-24[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-24[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-24Was using irq_enable_reg in the use_mask_reg pathKeith Packard
2008-06-23[intel-gem] Include drm_compat.h to get kmap_atomic_prot_pfnKeith Packard
2008-06-23drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-23[intel-gem] Use I915_GEM_DOMAIN_GTT in dri_gem_bo_wait_rendering.Keith Packard
I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires clflushing the frame buffer.
2008-06-23[intel] leave interrupts disabled in ISR only on MSI againKeith Packard
While debugging the 915, I tried this trick there and accidentally left it set.
2008-06-23[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-23[intel] Switch to using IMR instead of IERKeith Packard
2008-06-23[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-23[intel] allow the irq code to use either enable or mask registersKeith Packard
still not sure which works best on which hardware; this will make it easier to experiment.
2008-06-21[intel] Use IMR instead of IER to pend interrupts during ISRKeith Packard
Noting that the interrupt mask register was more reliable than the interrupt enable register for managing interrupts in user_irq_on/user_irq_off, this patch replaces the remaining IER frobbing with IMR instead. The test which exposes IER related failures is: $ glxgears & glxgears & glxgears (reposition the glxgears windows away from the upper left corner) $ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done & $ while :; do runoa; runet; done &
2008-06-21[intel-gem] Add /proc/dri/*/i915_gem_interruptKeith Packard
This tracks most of the interrupt-related status, including the interrupt registers in the chip and the sequence number variables.
2008-06-21[intel] Count received interruptsKeith Packard
Another patch adds this to a /proc/dri file for debugging and monitoring.
2008-06-21[intel-gem] Remove unused variable.Keith Packard
2008-06-20[intel-gem] Use polling in i915_gem_idle instead of interrupts.Keith Packard
While waiting for the hardware to idle on leavevt or lastclose, poll for the sync sequence number instead of waiting for an interrupt. This allows the code to bail if the hardware hangs for some reason. Also, this avoids issues with signals as the exisiting wait function is interruptible.
2008-06-20[intel-gem] Add intel-specific /proc entries to help monitor gem operationKeith Packard
This adds gem_active, gem_flushing, gem_inactive, gem_request and gem_seqno entries to monitor gem operation and help debug issues.
2008-06-20Add device-specific proc_init and proc_cleanup hooksKeith Packard
This allows device drivers to add proc files
2008-06-20[intel-gem] Use shmem_getpage instead of find_or_create_pageKeith Packard
find_or_create_page doesn't quite set up pages correctly; any newly created pages aren't hooked into the shmem object quite right; user space mmaps of those pages end up mapping pages full of zeros which then get written to the real pages inappropriately. This patch requires that the kernel export shmem_getpage.
2008-06-20[intel-gem] Add DRM_IOCTL_I915_GEM_SW_FINISH to flag CPU writesKeith Packard
When a software fallback has completed, usermode must notify the kernel so that any scanout buffers can be synchronized. This ioctl should be called whenever a fallback completes to flush CPU and chipset caches.
2008-06-18i915: add blanking support to intelfbJesse Barnes
Got tired of not having my LCD actually turn off when I left the machine at the console.
2008-06-18i915: cleanup PCI state before disabling MSIJesse Barnes
Core MSI code will BUG() if an interrupt handler is still registered when pci_disable_msi() is called.
2008-06-18Merge commit 'origin/drm-gem' into modesetting-gemJesse Barnes
Lots of conflicts, seems to load ok, but I'm sure some bugs snuck in. Conflicts: linux-core/drmP.h linux-core/drm_lock.c linux-core/i915_gem.c shared-core/drm.h shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-06-18i915: use WC mapping for framebuffer screen_baseJesse Barnes
2008-06-18Merge branch 'modesetting-101' into modesetting-gemJesse Barnes
2008-06-18i915: switch back to fbcon on panicJesse Barnes
Normally when X is running, panic messages will be invisible and the machine will just appear to hard hang. This patch adds support for switching back to the fbcon framebuffer on panic (through the use of a panic notifier registration) so we can see what happened. Note that in order to be really useful, X will have to run its VT in something other than KD_GRAPHICS mode. Also, not all kernel errors result in panics, some go through BUG() which may trigger another type of event, not resulting in a switch.
2008-06-16[intel] Quirk away MSI support on 945G/GM.Eric Anholt
The PCI caps register reports MSI support even though it isn't really there.
2008-06-16[linux] Use the device's irq for handler setup instead of stale dev->irq.Eric Anholt
This fixes registration when MSI is set up after the stub function fills in dev->irq. Otherwise /proc/interrupts would report attachment to the fasteoi interrupt. dev->irq is still exposed (and updated at IRQ setup) for the drivers that use it for whatever reason.
2008-06-13[intel-gem] Execute MI_FLUSH in leavevt_ioctlKeith Packard
In leavevt_ioctl, queue an MI_FLUSH and then block waiting for it to complete. This will empty the active and flushing lists. That leaves only the inactive list to evict.
2008-06-13[intel-gem] inactive list may contain objects in CPU write domainKeith Packard
Pin/unpin need to know whether to remove/add objects from the inactive list, inactive objects cannot be in any GPU write domain as those would be on the flushing list instead. However, inactive objects may be in the CPU write domain.
2008-06-13[intel-gem] BUG_ON active objects in gem_object_unbindKeith Packard
Now that gem_object_unbind waits for rendering to complete, objects should not be active when they are being pulled from the GTT. BUG_ON if this is broken.
2008-06-13[intel-gem] Debugging -- verify inactive list invariantsKeith Packard
Inactive list elements may not be pinned, active or have non-CPU write domains.
2008-06-13[intel-gem] whitespace fixesKeith Packard
2008-06-13[intel-gem] show total GTT space in /proc/dri/*/gem_objectsKeith Packard
2008-06-13[intel-gem] Wait for rendering to complete before unbinding.Keith Packard
Moving to the CPU domain doesn't ensure that rendering is finished, the buffer may still be in use as a texture or other data source.
2008-06-13[libdrm] Restart all ioctls on signal receiptKeith Packard
Receiving a signal should be ignored by the library, so just restart any ioctl which returns EINTR or EAGAIN.
2008-06-13[intel-gem] add gtt and pin counts to /proc/dri/*/gem_objectsKeith Packard
Not quite portable, but these are useful for intel. Some more general mechanism could be done...
2008-06-13[intel-gem] Left the last exec buffer pinned. oops.Keith Packard
Loop end variable 'pinned' was set one too low.
2008-06-13[intel-gem] Pin objects during execbufferKeith Packard
Pinning the objects avoids accidentally evicting them while binding other objects.
2008-06-13[intel-gem] throttle based on frames rather than time. Reduces jitter.Keith Packard
Record the last execbuffer sequence for each client. Record that sequence in the throttle ioctl as the 'throttle sequence'. Wait for the last throttle sequence in the throttle ioctl.
2008-06-13[intel-gem] evict_something was failing when wait_request freed objectsKeith Packard
When i915_wait_request clears object from the active list, it may end up freeing them and not moving them to the inactive list. This ends up unbinding objects from the GTT without there ever being new objects visible to i915_gem_evict_something on the inactive list. As the only success condition required the presence of objects on the inactive list, this would falsely assume that no GTT space had been made available, and end up returning -ENOMEM to the application.