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Signed-off-by: Robert Noland <rnoland@2hip.net>
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Doing my part to make DRM_DEBUG more chatty...
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ifdef out all the gem stuff for now. Also, the msi stuff isn't portable
the way it is... I'll try and fix that up sometime soon.
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We shuffled all the links around to disconnect the entry, but
never free it. We would incorrectly free the last entry in the
hash chain if nothing matched.
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sarea_priv needs to be NULL before i915_initialized is called to
properly reset it. The stale value produces a panic any time something
opens/closes drm without calling initialize. i.e. version checking
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Signed-off-by: Robert Noland <rnoland@2hip.net>
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Signed-off-by: Robert Noland <rnoland@2hip.net>
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This resolves the panic on FreeBSD during VT switch, without attempting
any of the more lofty goals for the time being.
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This patch allows you to --enable-udev, and will avoid having libdrm
make device nodes. If you are using udev, you should really --enable-udev
your libdrm.
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Corresponding DDX patch at http://people.freedesktop.org/~stuart/nv0x-nv4x_suspend/
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This resolves and issue on amd64 FreeBSD and it looks like the
linux ioctl syscall should be unsigned long as well.
Signed-off-by: Robert Noland <rnoland@2hip.net>
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If a specific tasklet shares data with irq context,
it needs to take a private irq-blocking spinlock within
the tasklet itself.
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Store the global name in global_name, don't overwrite the gem_handle.
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thanks to malc0 for pointing it out
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To build i915 driver pass OS_HAS_GEM=1 to make for now
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Conflicts:
shared-core/i915_dma.c
This brings in kernel support and userland interface for intel GEM.
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While the bufmgr isn't thread-safe at the moment, we need it to be for shared
objects between contexts.
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the nvidia driver does this, and it stops the error message appearing on nv40
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another name
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When i915_gem_retire_request has a flush which matches an object write
domain, clear the write domain. This will move the object to the inactive
list rather than the flushing list, avoiding trouble with objects left stuck
on the flushing list.
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In i915_gem_object_wait_rendering, if the object write domain is being
written by the GPU, the appropriate flushing commands are written to the
device and an additional request queued to mark that flush. Finally, the
function blocks on that new request.
The bug was that the write_domain in the object was cleared before the
function blocked.
If the wait is interrupted by a signal, the flushing commands may still be
pending. With the current write_domain information lost, the restarted
syscall will drop right through the write_domain test as that value was
lost, and so the function will not block at all. Oops.
Fixed by simply moving the write_domain clear until after the wait_request
succeeds. Note that the restarted system call will generate an additional
flush sequence and request, but that should be 'harmless', aside from a
slight performance impact.
Someday we'll track flushing more accurately and clear write_domains more
efficiently, but for now, this should suffice.
This bug was discovered in the 2d gem development by running x11perf
-copypixwin500 and noticing that the window got cleared accidentally.
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This reverts commit 965a72202b439068e62ac341990f51953457b202.
Please re-do over properly
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This reverts commit 3ad8db2071d30c198403e605f2726fc5c3e46bfd.
We ended up not needing that namespace, and I'd rather not have the churn
for producing diffs.
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This makes our handling of cliprects sane. drm_clip_rect always has exclusive
bottom-right corners, but the hardware expects inclusive bottom-right corners,
so we adjust this here.
This complements Michel Daenzer's commit 57aea290e1e0a26d1e74df6cff777eb9f038f1f8
to Mesa. See also http://bugs.freedesktop.org/show_bug.cgi?id=16123 .
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Conflicts:
linux-core/Makefile.kernel
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
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clearly the function had never been used :)
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