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2008-06-23drm_compat: it's CONFIG_HIGHMEM, not CONFIG_HIMEMKeith Packard
A mis-spelled config option (was it spelled that way in the past?) eliminated kmap_atomic_prot_pfn from core DRM.
2008-06-24NV50: fix some misc bugsMaarten Maathuis
2008-06-23[modesetting-101] update mode count after fill_modes.Maarten Maathuis
- This avoids returning with a mode count of 0, thus not allocating space for the 2nd ioctl.
2008-06-23libdrm: check for allocation failureMaarten Maathuis
2008-06-23NV50: Improve set_config and fix some minor bugs.Maarten Maathuis
2008-06-23[intel-gem] Use I915_GEM_DOMAIN_GTT in dri_gem_bo_wait_rendering.Keith Packard
I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires clflushing the frame buffer.
2008-06-23[intel] leave interrupts disabled in ISR only on MSI againKeith Packard
While debugging the 915, I tried this trick there and accidentally left it set.
2008-06-23[intel-gem] Recover resources from wedged hardware.Keith Packard
Clean up queues, free objects. On the next entervt, unmark the hardware to let the user try again (presumably after resetting the chip). Someday we'll automatically recover...
2008-06-23[intel] Switch to using IMR instead of IERKeith Packard
2008-06-23[intel-gem] pwrite through GTTKeith Packard
Pin/copy_from_user/unpin through the GTT to eliminate clflush costs. Benchmarks say this helps quite a bit.
2008-06-23[intel] allow the irq code to use either enable or mask registersKeith Packard
still not sure which works best on which hardware; this will make it easier to experiment.
2008-06-22nouveau: disable KMS for pre-NV50 even when specifically enabledMaarten Maathuis
2008-06-22NV50: Fix a few more possible leaks.Maarten Maathuis
2008-06-22fix typoMaarten Maathuis
2008-06-22NV50: A few minor added safeties + cleanup.Maarten Maathuis
2008-06-23nv50: oops, keep VRAM allocations aligned at 64KiB - that's our page size..Ben Skeggs
2008-06-23nv50: use same dma object for fb/tt accessBen Skeggs
We depend on the VM fully now for memory protection, separate DMA objects for VRAM and GART are unneccesary. However, until the next interface break (soon) a client can't depend on the objects being the same and must still call NV_OBJ_SET_DMA_* methods appropriately.
2008-06-22Undo something i didn't want to change.Maarten Maathuis
- I made it consistent with recent kernel fb code (maybe this is older bugged code?) - Still i don't use this and i should leave it to others.
2008-06-23nouveau: allocate drm-use vram buffers from end of vram.Ben Skeggs
This avoids seeing garbage from engine setup etc before X gets around to pointing the CRTCs at a new scanout buffer. Not actually a noticable problem before G80 as PRAMIN is forced to the end of VRAM by the hardware already.
2008-06-22NV50: Initial import of kernel modesetting.Maarten Maathuis
2008-06-22agp: use true/false instead of TRUE/FALSEDave Airlie
2008-06-21RADEON: 0x1002 0x5657 is actually an RV410Alex Deucher
See bug 14289
2008-06-21[intel] Use IMR instead of IER to pend interrupts during ISRKeith Packard
Noting that the interrupt mask register was more reliable than the interrupt enable register for managing interrupts in user_irq_on/user_irq_off, this patch replaces the remaining IER frobbing with IMR instead. The test which exposes IER related failures is: $ glxgears & glxgears & glxgears (reposition the glxgears windows away from the upper left corner) $ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done & $ while :; do runoa; runet; done &
2008-06-21[intel-gem] Add /proc/dri/*/i915_gem_interruptKeith Packard
This tracks most of the interrupt-related status, including the interrupt registers in the chip and the sequence number variables.
2008-06-21[intel] Count received interruptsKeith Packard
Another patch adds this to a /proc/dri file for debugging and monitoring.
2008-06-21[intel-gem] Remove unused variable.Keith Packard
2008-06-20[intel-gem] Use polling in i915_gem_idle instead of interrupts.Keith Packard
While waiting for the hardware to idle on leavevt or lastclose, poll for the sync sequence number instead of waiting for an interrupt. This allows the code to bail if the hardware hangs for some reason. Also, this avoids issues with signals as the exisiting wait function is interruptible.
2008-06-20[intel-gem] Add intel-specific /proc entries to help monitor gem operationKeith Packard
This adds gem_active, gem_flushing, gem_inactive, gem_request and gem_seqno entries to monitor gem operation and help debug issues.
2008-06-20Add device-specific proc_init and proc_cleanup hooksKeith Packard
This allows device drivers to add proc files
2008-06-20[intel-gem] Use shmem_getpage instead of find_or_create_pageKeith Packard
find_or_create_page doesn't quite set up pages correctly; any newly created pages aren't hooked into the shmem object quite right; user space mmaps of those pages end up mapping pages full of zeros which then get written to the real pages inappropriately. This patch requires that the kernel export shmem_getpage.
2008-06-20[intel-gem] Add DRM_IOCTL_I915_GEM_SW_FINISH to flag CPU writesKeith Packard
When a software fallback has completed, usermode must notify the kernel so that any scanout buffers can be synchronized. This ioctl should be called whenever a fallback completes to flush CPU and chipset caches.
2008-06-20drm: only use kernel ioctl cmd when doing a core ioctl.Dave Airlie
Need to overhaul the mess that is driver ioctls
2008-06-20r300: fix warningDave Airlie
2008-06-20drm: fix the ioctl to not believe userspace.Dave Airlie
believing userspace causes oopses
2008-06-18i915: add blanking support to intelfbJesse Barnes
Got tired of not having my LCD actually turn off when I left the machine at the console.
2008-06-18i915: cleanup PCI state before disabling MSIJesse Barnes
Core MSI code will BUG() if an interrupt handler is still registered when pci_disable_msi() is called.
2008-06-18Merge commit 'origin/drm-gem' into modesetting-gemJesse Barnes
Lots of conflicts, seems to load ok, but I'm sure some bugs snuck in. Conflicts: linux-core/drmP.h linux-core/drm_lock.c linux-core/i915_gem.c shared-core/drm.h shared-core/i915_dma.c shared-core/i915_drv.h shared-core/i915_irq.c
2008-06-18i915: use WC mapping for framebuffer screen_baseJesse Barnes
2008-06-18Merge branch 'modesetting-101' into modesetting-gemJesse Barnes
2008-06-18i915: switch back to fbcon on panicJesse Barnes
Normally when X is running, panic messages will be invisible and the machine will just appear to hard hang. This patch adds support for switching back to the fbcon framebuffer on panic (through the use of a panic notifier registration) so we can see what happened. Note that in order to be really useful, X will have to run its VT in something other than KD_GRAPHICS mode. Also, not all kernel errors result in panics, some go through BUG() which may trigger another type of event, not resulting in a switch.
2008-06-18i915: Add support for Intel 4 series chipsetsZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
2008-06-16[intel] Quirk away MSI support on 945G/GM.Eric Anholt
The PCI caps register reports MSI support even though it isn't really there.
2008-06-16[linux] Use the device's irq for handler setup instead of stale dev->irq.Eric Anholt
This fixes registration when MSI is set up after the stub function fills in dev->irq. Otherwise /proc/interrupts would report attachment to the fasteoi interrupt. dev->irq is still exposed (and updated at IRQ setup) for the drivers that use it for whatever reason.
2008-06-15radeon: *really* fix screen corruption thanks to Lukasz KrotowskiJerome Glisse
2008-06-15radeon: actualy try to fix the corruptionJerome Glisse
2008-06-15radeon: fix screen corruption introduced by last patchJerome Glisse
2008-06-13[intel-gem] Execute MI_FLUSH in leavevt_ioctlKeith Packard
In leavevt_ioctl, queue an MI_FLUSH and then block waiting for it to complete. This will empty the active and flushing lists. That leaves only the inactive list to evict.
2008-06-13[intel-gem] inactive list may contain objects in CPU write domainKeith Packard
Pin/unpin need to know whether to remove/add objects from the inactive list, inactive objects cannot be in any GPU write domain as those would be on the flushing list instead. However, inactive objects may be in the CPU write domain.
2008-06-13[intel-gem] BUG_ON active objects in gem_object_unbindKeith Packard
Now that gem_object_unbind waits for rendering to complete, objects should not be active when they are being pulled from the GTT. BUG_ON if this is broken.
2008-06-13[intel-gem] Debugging -- verify inactive list invariantsKeith Packard
Inactive list elements may not be pinned, active or have non-CPU write domains.