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AgeCommit message (Expand)Author
2008-05-27[intel-gem] Replace idlelock usage with real lock acquisition.Eric Anholt
2008-05-28i915: fix BSD bh, DRI2 not uses anywhere elseDave Airlie
2008-05-28radeon: bump release date/version for r500 3D supportDave Airlie
2008-05-27RADEON: add get_param for number of GB pipesAlex Deucher
2008-05-27[BSD] Move unlock in drm_vm.c from accidental platform #ifdeffing.Owain Ainsworth
2008-05-27[BSD] Fix lock leak in drm_update_draw malloc failure path.Owain Ainsworth
2008-05-27[BSD] Fix lock leaks in error paths in drm_bufs.c.Owain Ainsworth
2008-05-27[BSD] Remove superfluous recursive locking in drm_add_magic.Owain Ainsworth
2008-05-27[i915] Fix typo in (unused) START_ADDR definition.Jie Luo
2008-05-27[FreeBSD] Add vblank-rework support and get drivers building.Robert Noland
2008-05-27[FreeBSD] Convert from drm_device_t to struct drm_device for consistency.Eric Anholt
2008-05-26[intel-gem] Must hold DRM lock while setting object domainKeith Packard
2008-05-26[i915] leave interrupts masked off when not in use.Keith Packard
2008-05-25[intel-gem] Add DRM_I915_GEM_BUSY ioctl to check for idle buffers.Keith Packard
2008-05-25[intel-gem] Compute npages instead of nbytes in flush_pwriteKeith Packard
2008-05-25[intel-gem] replace call to jiffies_to-msec with simple inlineKeith Packard
2008-05-23i915: do a better job of parsing VBIOS dataJesse Barnes
2008-05-23drm_mode_debug_printmodeline doesn't need struct drm_device *Jesse Barnes
2008-05-22[intel-gem] Encourage multiple caches to hold read dataKeith Packard
2008-05-22[gem] Use CPU domain for new or pageable objectsKeith Packard
2008-05-22[intel-gem] Force ring retire by emiting flush before user-interrupt.Keith Packard
2008-05-22[intel] Add debug code to verify the cached ring tail pointer.Keith Packard
2008-05-22[intel-gem] invalidate ring locals for pin/unpin/set_domain/free functionsKeith Packard
2008-05-22[gem] Release GEM buffers from work task scheduled from IRQ.Eric Anholt
2008-05-23r500: add two more register ranges for mesa driver to setupDave Airlie
2008-05-23drm: fix nouveau warningDave Airlie
2008-05-22i915: check dummy page before freeingHong Liu
2008-05-22i915: init bo mm at driver init only when modeset=1Hong Liu
2008-05-21[gem] Replace ring throttling hack with actual time measurement.Eric Anholt
2008-05-21[gem] Fix bad test for list_for_each completion.Eric Anholt
2008-05-21[gem] Hold a reference on the object in i915_gem_wait_space.Eric Anholt
2008-05-21[intel-gem] invalidate ring locals for pin/unpin/set_domain/free functionsKeith Packard
2008-05-21rs690/r500: vblank support.Dave Airlie
2008-05-20[gem] Use a separate sequence number field from classic/ttmEric Anholt
2008-05-20[gem] Rename sequence numbers from "cookie" to "seqno"Eric Anholt
2008-05-20[gem] Clean up active/inactive list handling using helper functions.Eric Anholt
2008-05-17r500: add more register ranges for Mesa driverDave Airlie
2008-05-15[gem] Hold dev->struct_mutex to protect structure data.Eric Anholt
2008-05-15[gem] Rename the GTT LRU lists to active (executing) and inactive (idle).Eric Anholt
2008-05-15[gem] typo fix in comment.Eric Anholt
2008-05-14ati_pcigart: oops wrong way around not that it actually matteredDave Airlie
2008-05-14ati_pcigart: stop working in the evenings you mess up too oftenDave Airlie
2008-05-14Revert "ati_pcigart: fixup properly this version might even work"Dave Airlie
2008-05-14ati_pcigart: fixup properly this version might even workDave Airlie
2008-05-14ati_pcigart: fill out 40-bit gart table support properlyDave Airlie
2008-05-13RS4xx: separate out RS400 and RS480 IGP chipsAlex Deucher
2008-05-13Merge branch 'modesetting-101' of ssh://git.freedesktop.org/git/mesa/drm into...Jesse Barnes
2008-05-13i915: register definition & header file cleanupJesse Barnes
2008-05-13i915: execbuf now works without i915_dma_init being calledJakob Bornecrantz
2008-05-12i915: TV hotplug fixesJesse Barnes
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-22 13:43:13 +0000
gned int sarea_priv_offset; /* some parameters */ unsigned int cob_size; unsigned int bci_threshold_lo, bci_threshold_hi; unsigned int dma_type; /* frame buffer layout */ unsigned int fb_bpp; unsigned int front_offset, front_pitch; unsigned int back_offset, back_pitch; unsigned int depth_bpp; unsigned int depth_offset, depth_pitch; /* local textures */ unsigned int texture_offset; unsigned int texture_size; /* physical locations of non-permanent maps */ unsigned long status_offset; unsigned long buffers_offset; unsigned long agp_textures_offset; unsigned long cmd_dma_offset; } drm_savage_init_t; typedef union drm_savage_cmd_header drm_savage_cmd_header_t; typedef struct drm_savage_cmdbuf { /* command buffer in client's address space */ drm_savage_cmd_header_t __user *cmd_addr; unsigned int size; /* size of the command buffer in 64bit units */ unsigned int dma_idx; /* DMA buffer index to use */ int discard; /* discard DMA buffer when done */ /* vertex buffer in client's address space */ unsigned int __user *vb_addr; unsigned int vb_size; /* size of client vertex buffer in bytes */ unsigned int vb_stride; /* stride of vertices in 32bit words */ /* boxes in client's address space */ struct drm_clip_rect __user *box_addr; unsigned int nbox; /* number of clipping boxes */ } drm_savage_cmdbuf_t; #define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ #define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ #define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ typedef struct drm_savage_event { unsigned int count; unsigned int flags; } drm_savage_event_emit_t, drm_savage_event_wait_t; /* Commands for the cmdbuf ioctl */ #define SAVAGE_CMD_STATE 0 /* a range of state registers */ #define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ #define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ #define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ #define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ #define SAVAGE_CMD_CLEAR 5 /* clear buffers */ #define SAVAGE_CMD_SWAP 6 /* swap buffers */ /* Primitive types */ #define SAVAGE_PRIM_TRILIST 0 /* triangle list */ #define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ #define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ #define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat * shading on s3d */ /* Skip flags (vertex format) */ #define SAVAGE_SKIP_Z 0x01 #define SAVAGE_SKIP_W 0x02 #define SAVAGE_SKIP_C0 0x04 #define SAVAGE_SKIP_C1 0x08 #define SAVAGE_SKIP_S0 0x10 #define SAVAGE_SKIP_T0 0x20 #define SAVAGE_SKIP_ST0 0x30 #define SAVAGE_SKIP_S1 0x40 #define SAVAGE_SKIP_T1 0x80 #define SAVAGE_SKIP_ST1 0xc0 #define SAVAGE_SKIP_ALL_S3D 0x3f #define SAVAGE_SKIP_ALL_S4 0xff /* Buffer names for clear command */ #define SAVAGE_FRONT 0x1 #define SAVAGE_BACK 0x2 #define SAVAGE_DEPTH 0x4 /* 64-bit command header */ union drm_savage_cmd_header { struct { unsigned char cmd; /* command */ unsigned char pad0; unsigned short pad1; unsigned short pad2; unsigned short pad3; } cmd; /* generic */ struct { unsigned char cmd; unsigned char global; /* need idle engine? */ unsigned short count; /* number of consecutive registers */ unsigned short start; /* first register */ unsigned short pad3; } state; /* SAVAGE_CMD_STATE */ struct { unsigned char cmd; unsigned char prim; /* primitive type */ unsigned short skip; /* vertex format (skip flags) */ unsigned short count; /* number of vertices */ unsigned short start; /* first vertex in DMA/vertex buffer */ } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ struct { unsigned char cmd; unsigned char prim; unsigned short skip; unsigned short count; /* number of indices that follow */ unsigned short pad3; } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ struct { unsigned char cmd; unsigned char pad0; unsigned short pad1; unsigned int flags; } clear0; /* SAVAGE_CMD_CLEAR */ struct { unsigned int mask; unsigned int value; } clear1; /* SAVAGE_CMD_CLEAR data */ }; #endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-22 13:43:13 +0000