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We won't get a PFIFO context switch when the same channel ID is recreated if
the hw still thinks the channel is already active, which causes fun issues.
Should allow X to be stopped and started without tearing down the entire
card state in lastclose().
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This avoids seeing garbage from engine setup etc before X gets around
to pointing the CRTCs at a new scanout buffer. Not actually a noticable
problem before G80 as PRAMIN is forced to the end of VRAM by the hardware
already.
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With the interrupt enable/disable using only the mask register, it was wrong
to use the enable register to detect which pipes had vblank detection
turned on. Also, as we keep a local copy of the mask register around, and
MSI machines smack the hardware during the interrupt handler, it is more
efficient and more correct to use the local copy.
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This shares common code sequences for managing the interrupt register bits
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A mis-spelled config option (was it spelled that way in the past?)
eliminated kmap_atomic_prot_pfn from core DRM.
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I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires
clflushing the frame buffer.
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Clean up queues, free objects. On the next entervt, unmark the hardware to
let the user try again (presumably after resetting the chip). Someday we'll
automatically recover...
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Pin/copy_from_user/unpin through the GTT to eliminate clflush costs.
Benchmarks say this helps quite a bit.
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A mis-spelled config option (was it spelled that way in the past?)
eliminated kmap_atomic_prot_pfn from core DRM.
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- This avoids returning with a mode count of 0, thus not allocating space for the 2nd ioctl.
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I915_GEM_DOMAIN_CPU is very expensive to wait for -- it generally requires
clflushing the frame buffer.
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While debugging the 915, I tried this trick there and accidentally left it
set.
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Clean up queues, free objects. On the next entervt, unmark the hardware to
let the user try again (presumably after resetting the chip). Someday we'll
automatically recover...
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Pin/copy_from_user/unpin through the GTT to eliminate clflush costs.
Benchmarks say this helps quite a bit.
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still not sure which works best on which hardware; this will make it easier
to experiment.
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- I made it consistent with recent kernel fb code (maybe this is older bugged code?)
- Still i don't use this and i should leave it to others.
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Noting that the interrupt mask register was more reliable than the interrupt
enable register for managing interrupts in user_irq_on/user_irq_off, this
patch replaces the remaining IER frobbing with IMR instead.
The test which exposes IER related failures is:
$ glxgears & glxgears & glxgears
(reposition the glxgears windows away from the upper left corner)
$ while :; do x11perf -rect100 -reps 800 -repeat 1; sleep 1; done &
$ while :; do runoa; runet; done &
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This tracks most of the interrupt-related status, including the
interrupt registers in the chip and the sequence number variables.
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Another patch adds this to a /proc/dri file for debugging and monitoring.
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While waiting for the hardware to idle on leavevt or lastclose, poll
for the sync sequence number instead of waiting for an interrupt. This
allows the code to bail if the hardware hangs for some reason. Also, this
avoids issues with signals as the exisiting wait function is interruptible.
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This adds gem_active, gem_flushing, gem_inactive, gem_request and gem_seqno
entries to monitor gem operation and help debug issues.
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This allows device drivers to add proc files
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find_or_create_page doesn't quite set up pages correctly; any newly created
pages aren't hooked into the shmem object quite right; user space mmaps of
those pages end up mapping pages full of zeros which then get written to the
real pages inappropriately. This patch requires that the kernel export
shmem_getpage.
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When a software fallback has completed, usermode must notify the kernel so
that any scanout buffers can be synchronized. This ioctl should be called
whenever a fallback completes to flush CPU and chipset caches.
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Got tired of not having my LCD actually turn off when I left the machine at the
console.
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Core MSI code will BUG() if an interrupt handler is still registered when
pci_disable_msi() is called.
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Lots of conflicts, seems to load ok, but I'm sure some bugs snuck in.
Conflicts:
linux-core/drmP.h
linux-core/drm_lock.c
linux-core/i915_gem.c
shared-core/drm.h
shared-core/i915_dma.c
shared-core/i915_drv.h
shared-core/i915_irq.c
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Normally when X is running, panic messages will be invisible and the machine
will just appear to hard hang. This patch adds support for switching back to
the fbcon framebuffer on panic (through the use of a panic notifier
registration) so we can see what happened.
Note that in order to be really useful, X will have to run its VT in something
other than KD_GRAPHICS mode. Also, not all kernel errors result in panics,
some go through BUG() which may trigger another type of event, not resulting in
a switch.
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The PCI caps register reports MSI support even though it isn't really there.
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