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2007-03-13nouveau: s/fifo/channel/Ben Skeggs
2007-03-13Corrected values written to R300_RB3D_DSTCACHE_CTLSTAT to eitherOliver McFadden
R300_RB3D_DSTCACHE_02 or R300_RB3D_DSTCACHE_0A, rather than hexadecimal values.
2007-03-13Guess another unknown register used for R300 pacification.Oliver McFadden
2007-03-12Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-11nouveau: PUT,GET, not 2xPUTPatrice Mandin
2007-03-07Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-07Add via CX700.Thomas Hellstrom
2007-03-05Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-03-04radeon: make PCI GART aperture size variable, but making table size variableDave Airlie
This is precursor to getting a TTM backend for this stuff, and also allows the PCI table to be allocated at fb 0
2007-03-04ati: make pcigart code able to handle variable size PCI GART apertureDave Airlie
This code doesn't enable a variable aperture it just modifies the codebase to allow me fix it up later
2007-03-01Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-28Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-28nouveau: intrusive drm interface changesBen Skeggs
graphics objects: - No longer takes flags/dmaobj parameters, requires some major changes to the ddx to setup the object through the FIFO. This change is likely to cause breakages on some cards (tested on NV05,NV28,NV35, NV40 and NV4E). dma objects: - now takes a "class" parameter, not really used yet but we may need it at some point. - parameters are checked, so clients can't randomly create DMA objects pointing at whatever they feel like. misc: - Added FB_SIZE/AGP_SIZE getparams - Read PFIFO_INTR in PFIFO irq handler, not PMC_INTR - Dump PGRAPH trap info on PGRAPH_INTR_NOTIFY if NSOURCE isn't NOTIFICATION_PENDING.
2007-02-27Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-27Fix Alpha domain/bus issueJay Estabrook
2007-02-26Fix build for 2.6.21-rc1.Thomas Hellstrom
The vm subsystem of 2.6.21 is fully compatible with the buffer object vm code.
2007-02-25Merge git://proxy01.pd.intel.com:9419/git/mesa/drm into crestlineNian Wu
2007-02-25drm: remove unnecessary NULL checks, and fix some indents..Jakob Bornecrantz
2007-02-22Some fencing cleanup.Thomas Hellstrom
2007-02-18drm: remove last usage of VM_OFFSETDave Airlie
2007-02-16Leftover files from previous commit.Thomas Hellstrom
2007-02-16Simple fence object sample driver for via, based on idling the GPU.Thomas Hellstrom
Buffer object driver for via. Some changes to buffer object driver callbacks. Improve fence flushing.
2007-02-15Initial support for fence object classes.Thomas Hellstrom
(Fence objects belonging to different command submission mechanisms).
2007-02-15Fix build against older kernels.Michel Dänzer
2007-02-14Merge branch 'ttm-vram-0-1-branch'Thomas Hellstrom
2007-02-14Fix multiple spinlock unlockingThomas Hellstrom
2007-02-14Rename drm_ttm.h to drm_objects.hThomas Hellstrom
Fix up some header incompatibilities in drm_fence.c caused by the previous commit.
2007-02-14Move fence- and buffer-object related header stuff to drm_ttm.hThomas Hellstrom
2007-02-14Remove an intel-specific hack and replace it with a fence driver callback.Thomas Hellstrom
2007-02-14Set the drm bus map type for each buffer object memory type.Thomas Hellstrom
2007-02-14Rework buffer object vm code to use nopfn() for kernels >= 2.6.19.Thomas Hellstrom
2007-02-14nouveau: fix the build on big endian (thanks CyberFoxx)Stephane Marchesin
2007-02-14nouveau: fix memory initialization with multiple cards.B. Rathmann
2007-02-13Remove debug printout.Thomas Hellstrom
2007-02-13Bugzilla Bug #9457Thomas Hellstrom
Add refcounting of user waiters to the DRM hardware lock, so that we can use the DRM_LOCK_CONT flag more conservatively. Also add a kernel waiter refcount that if nonzero transfers the lock for the kernel context, when it is released. This is useful when waiting for idle and can be used for very simple fence object driver implementations for the new memory manager. It also resolves the AIGLX startup deadlock for the sis and the via drivers. i810, i830 still require that the hardware lock is really taken so the deadlock remains for those two. I'm not sure about ffb. Anyone familiar with that code?
2007-02-13More bugfixes.Thomas Hellstrom
Fixed memory, pinned buffers and unmappable memory now seems fully functional.
2007-02-13i915: Add 965GM pci id updateWang Zhenyu
2007-02-13Merge branch 'master' into crestlineWang Zhenyu
2007-02-13Revert "Add Intel 965GM chipset support"Wang Zhenyu
This would be updated with external pci id file change.
2007-02-12Fix some outdated URLs, remove others.Adam Jackson
2007-02-12Update flags and comments.Thomas Hellstrom
2007-02-12Lindent.Thomas Hellstrom
2007-02-12More bugfixes.Thomas Hellstrom
2007-02-12Cleanup and fix support for pinned buffers.Thomas Hellstrom
2007-02-11Sync r300_reg.h from mesa driver. #10210Aapo Tahkola
2007-03-11replace instance of SA_SHIRQ with IRQF_SHAREDMaarten Maathuis
backwards compat added by airlied
2007-03-10Bump version patchlevel so it can be tested for new functionality.Michel Dänzer
2007-03-10Merge branch 'i915-pageflip'Michel Dänzer
2007-03-10i915: Only wait for pending flips before asynchronous flips again.Michel Dänzer
2007-03-09i915: Do not wait for pending flips on both pipes at the same time.Michel Dänzer
The MI_WAIT_FOR_EVENT instruction does not support waiting for several events at once, so this should fix the lockups with page flipping when both pipes are enabled.
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