Age | Commit message (Collapse) | Author | |
---|---|---|---|
2007-07-20 | Changed mode config spinlock to mutex | Jakob Bornecrantz | |
2007-07-19 | Fix unlocking of spinlock when we should not | Jakob Bornecrantz | |
2007-06-29 | Move out the code from i915_dma_cleanup to unload to match | Alan Hourihane | |
existing code. This needs verifying. | |||
2007-06-29 | Bring back code from merge that was accidentally removed. | Alan Hourihane | |
2007-06-29 | merge fixes | Alan Hourihane | |
2007-06-29 | Merge branch 'master' of git+ssh://git.freedesktop.org/git/mesa/drm into ↵ | Alan Hourihane | |
modesetting-101 Conflicts: linux-core/drm_drv.c linux-core/drm_fops.c linux-core/drm_objects.h linux-core/drm_stub.c shared-core/i915_dma.c | |||
2007-06-29 | Avoid hitting BUG() for kernel-only fence objects. | Thomas Hellstrom | |
2007-06-29 | Fence object reference / dereference cleanup. | Thomas Hellstrom | |
Buffer object dereference cleanup. Add a struct drm_device member to fence objects: This can simplify code, particularly in drivers. | |||
2007-06-29 | nouveau: small RAMFC cleanups | Ben Skeggs | |
2007-06-28 | Fix type/flags usage problem to check for preferred modes. | Alan Hourihane | |
Add more debugging to help diagnose problems. | |||
2007-06-28 | nouveau: Hack around possible Xv blit adaptor breakage | Ben Skeggs | |
2007-06-28 | nouveau/nv10: Fix earlier NV1x chips | Ben Skeggs | |
Can't use nv04 code for them, since an extra field was inserted into RAMFC after DMA_PUT/GET. | |||
2007-06-28 | nouveau: never touch PRAMIN with NV_WRITE, cleanup RAMHT code a bit | Ben Skeggs | |
2007-06-28 | nouveau: simplify PRAMIN access | Ben Skeggs | |
2007-06-28 | nouveau: name some regs | Ben Skeggs | |
2007-06-28 | nouveau/nv50: skeletal backend | Ben Skeggs | |
2007-06-28 | nouveau: Nuke DMA_OBJECT_INIT ioctl (bumps interface to 0.0.7) | Ben Skeggs | |
For various reasons, this ioctl was a bad idea. At channel creation we now automatically create DMA objects covering available VRAM and GART memory, where the client used to do this themselves. However, there is still a need to be able to create DMA objects pointing at specific areas of memory (ie. notifiers). Each channel is now allocated a small amount of memory from which a client can suballocate things (such as notifiers), and have a DMA object created which covers the suballocated area. The NOTIFIER_ALLOC ioctl exposes this functionality. | |||
2007-06-28 | nouveau/nv04: Set NV_PFIFO_CACHE1_PUSH1 correctly + small tweaks | Ben Skeggs | |
2007-06-26 | Add support SiS based XGI chips to SiS DRM. | Ian Romanick | |
2007-06-25 | nouveau: NV49/NV4B PGRAPH setup from jb17bsome and stephan_2303 | Ben Skeggs | |
2007-06-24 | nouveau: kill some dead code | Ben Skeggs | |
2007-06-24 | nouveau: NV04/NV10/NV20 PGRAPH engtab functions | Ben Skeggs | |
NV04/NV10 load_context()/save_context() are stubs. I don't know enough about how they work to implement them sanely. The "old" context_switch() code remains hooked up, so it shouldn't break anything. NV20 will probably break if load_context() works. No inital context values are filled in, so when the first channel is created PGRAPH will probably end up having its state zeroed. Some setup from nv20_graph_init() will probably need to be moved to the per-channel context setup. | |||
2007-06-24 | nouveau: NV3X PGRAPH engtab functions | Ben Skeggs | |
2007-06-24 | nouveau: NV1X/2X/3X PFIFO engtab functions | Ben Skeggs | |
Earlier NV1X chips use the NV04 code, see previous commits about NV10 RAMFC entry size. | |||
2007-06-24 | nouveau: NV04 PFIFO engtab functions | Ben Skeggs | |
2007-06-24 | nouveau: NV4X PGRAPH engtab functions | Ben Skeggs | |
2007-06-24 | nouveau: NV4X PFIFO engtab functions | Ben Skeggs | |
2007-06-24 | nouveau: split PFIFO/PGRAPH context creation | Ben Skeggs | |
2007-06-24 | nouveau: (mostly) hook up put_base again | Ben Skeggs | |
2007-06-24 | nouveau: prototype PFIFO/PGRAPH engtab API | Ben Skeggs | |
2007-06-24 | nouveau: rename engtab functions | Ben Skeggs | |
2007-06-22 | radeon: Acknowledge all interrupts we're interested in. | Michel Dänzer | |
Failure to do so was probably the root cause of fd.o bug 11287. | |||
2007-06-21 | r300: Synchronized the register defines file; documentation changes. | Oliver McFadden | |
2007-06-21 | r300: Allow writes to R300_VAP_PVS_WAITIDLE. | Oliver McFadden | |
2007-06-18 | r300: Registers 0x2220-0x2230 are known as R300_VAP_CLIP_X_0-R300_VAP_CLIP_Y_1. | Oliver McFadden | |
2007-06-18 | r300: Synchronized the register defines file again. | Oliver McFadden | |
2007-06-18 | fix radeon setparam on 32/64 systems, harder. | David Woodhouse | |
Commit 9b01bd5b284bbf519b726b39f1352023cb5e9e69 introduced a compat_ioctl handler for RADEON_SETPARAM, the sole purpose of which was to handle the fact that on i386, alignof(uint64_t)==4. Unfortunately, this handler was installed for _all_ 64-bit architectures, instead of only x86_64 and ia64. And thus it breaks 32-bit compatibility on every other arch, where 64-bit integers are aligned to 8 bytes in 32-bit mode just the same as in 64-bit mode. Arnd has a cunning plan to use 'compat_u64' with appropriate alignment attributes according to the 32-bit ABI, but for now let's just make the compat_radeon_cp_setparam routine entirely disappear on 64-bit machines whose 32-bit compat support isn't for i386. It would be a no-op with compat_u64 anyway. Signed-off-by: David Woodhouse <dwmw2@infradead.org> | |||
2007-06-15 | i915: Fix handling of breadcrumb counter wraparounds. | Michel Dänzer | |
2007-06-15 | Fix i915 sequence mask. | Thomas Hellstrom | |
2007-06-15 | Indentation fixes. | Thomas Hellstrom | |
2007-06-15 | Fix refcounting / lock race. | Thomas Hellstrom | |
Reported by Steve Wilkins / Michel Dänzer. | |||
2007-06-15 | Locking fixes and instrumentation. | Thomas Hellstrom | |
2007-06-13 | Fix drmMMUnlock / drmMMLock return values. | Thomas Hellstrom | |
2007-06-13 | Make sure we read fence->signaled while spinlocked. | Thomas Hellstrom | |
2007-06-13 | Fix fence object deref race. | Thomas Hellstrom | |
2007-06-10 | use krh's idr mods to remove lists from idr code | Dave Airlie | |
2007-06-08 | r300: Added the CP maximum fetch size and ring rptr update variables. | Oliver McFadden | |
2007-06-07 | oops must fix this properly at some point | Dave Airlie | |
2007-06-07 | drm: fix radeon setparam alignment issues on 32/64-bit | Dave Airlie | |
2007-06-05 | r300: Small correction to the previous commit. | Oliver McFadden | |