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2007-02-02nouveau: nv10 ctx switch, some regs are nv17+ onlyMatthieu Castet
2007-02-02Make git ignore generated config.h.in.Michel Dänzer
2007-02-02via: Try to improve command-buffer chaining.Thomas Hellstrom
Bump driver date and patchlevel.
2007-02-02Disable AGP DMA for chips with the new 3D engine.Thomas Hellstrom
2007-01-31Make the utility runnable also for normal users.Thomas Hellstrom
2007-01-31Fix an error-path oops.Thomas Hellstrom
2007-01-30Add a buffer object transfer function.Thomas Hellstrom
Creates a placeholder for the old buffer contents when it is transfered to / from static memory like VRAM.
2007-01-30Indent according to xorg rules.Thomas Hellstrom
2007-01-30Add license header.Thomas Hellstrom
2007-01-30Add some relevant tests for the new buffer object interface.Thomas Hellstrom
2007-01-30Add the ttmtest test utility.Thomas Hellstrom
2007-01-30Clean up buffer object destruction somewhat.Thomas Hellstrom
2007-01-29Use pre-defined list_splice function.Thomas Hellstrom
2007-01-29s/buf/bo/ for consistency.Thomas Hellstrom
2007-01-29Some cleanup. A buffer object should only have one active memory type.Thomas Hellstrom
2007-01-28nouveau: determine chipset type at startup, instead of every time we use it.Ben Skeggs
2007-01-26make works ctx switch on nv10.Matthieu Castet
2007-01-26nouveau: oops, wrong indexing in nv17 regsPatrice Mandin
2007-01-26nouveau: read gpu type oncePatrice Mandin
2007-01-26nouveau: only save/restore nv17 regs on nv17,18 hwPatrice Mandin
2007-01-26nouveau: add extra pgraph registersPatrice Mandin
2007-01-26nouveau: add some nv10 pgraph definesPatrice Mandin
2007-01-25nouveau: simplify and fix BIG_ENDIAN flagsPatrice Mandin
2007-01-25Remove a scary error printed when we were leaking memory caches.Thomas Hellstrom
We don't use memory caches anymore... Fix memory accounting initialization to only use low or DMA32 memory.
2007-01-25nouveau: nv4c default contextBen Skeggs
2007-01-25nouveau: always print nsource/nstatus regs on PGRAPH errorsBen Skeggs
2007-01-24vblank interrupt fixZou Nan hai
2007-01-19nouveau: fix getparam from 32-bit client on 64-bit kernelBen Skeggs
2007-01-19nouveau: re-add 6150 Go pciid (0x0244)Ben Skeggs
2007-01-18nouveau: cleanup nv30_graph.cJeremy Kolb
2007-01-18nouveau: Remove write to CTX_SIZE. This gives us proper nv3x PGRAPH switching.Jeremy Kolb
2007-01-18add missing quadro idDave Jones
2007-01-17nouveau: Try to get nv35 pgraph switching working. Doesn't quite yet.Jeremy Kolb
Hook into nv20 pgraph switching functions (they're identical for nv3x). Actually call nv30_pgraph_context_init so the ctx_table is allocated. Thanks to Carlos Martin for the help.
2007-01-14nouveau: opps nv20 ctx ramin size was wrongMatthieu Castet
2007-01-13nouveau: opps restored the wrong channelMatthieu Castet
2007-01-13nouveau: nv20 graph ctx switch.Matthieu Castet
Untested...
2007-01-13nouveau: first step to make graph ctx worksMatthieu Castet
It is still not working, but now we could use some 3D commands without needed to run nvidia blob before.
2007-01-13nouveau: add and indent pgraph regsMatthieu Castet
2007-01-13nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value.Stephane Marchesin
2007-01-13nouveau: add missing symlinkDave Airlie
2007-01-12nouveau : remove useless init : we clear RAMIN beforeMatthieu Castet
2007-01-12Delay for a usec while spinning waiting for ring buffer space.Haihao Xiang
This means the loop will wait up to ~10ms for ring buffer space to become available, rather than just however long it takes to check the space 10000 times. This matches other drivers' behavior when waiting for ring buffer/fifo space.
2007-01-12nouveau: get nv30 context switching to work.Jeremy Kolb
* Pulled in some registers from nv10reg.h. Needed for context switching. * Filled in nv30 graphics context (based on nv40_graph.c). * Figure out nv30 context table, set up on context creation. Allows the cards automatic switching to work.
2007-01-11radeon: Fix u32 overflows when determining AGP base address in card space.Michel Dänzer
The overflows could lead to the AGP aperture overlapping the framebuffer area in the card's address space when the latter is located at the very end of the 32 bit address space, which would result in a freeze on X server startup, probably because the card read commands from the framebuffer instead of from AGP. See http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=392915 .
2007-01-10Revert "nouveau: Fill in context_init for nv10-nv3x."Dave Airlie
This reverts ac076cb9aff976e8fae567cfa82a898bfc2712e8 commit. Well it didn't do anything interesting...
2007-01-09nouveau: Fill in context_init for nv10-nv3x.Jeremy Kolb jkolb@brandeis.edu
Fill in the context with the values from PFIFO_CACH1. This should work from nv10 through the nv30 series.
2007-01-10nouveau: Don't use DRIVER_USE_MTRR, we already setup our own mtrr over vram.Stephane Marchesin
2007-01-09ttm: make ttm alloc/free into alloc_pages/free_pagesDave Airlie
Add a vmalloc flag to the page flags
2007-01-09novueau: try resource 3 if resource 2 is 0 lengthDave Airlie
This happens on my NV43 PPC
2007-01-08nouveau: fix nv4a context size.Stephane Marchesin