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AgeCommit message (Expand)Author
2007-01-13nouveau: add and indent pgraph regsMatthieu Castet
2007-01-13nouveau: Oops, fix the nv04 RAMFC_DMA_FETCH value.Stephane Marchesin
2007-01-13nouveau: add missing symlinkDave Airlie
2007-01-12nouveau : remove useless init : we clear RAMIN beforeMatthieu Castet
2007-01-12Delay for a usec while spinning waiting for ring buffer space.Haihao Xiang
2007-01-12nouveau: get nv30 context switching to work.Jeremy Kolb
2007-01-11radeon: Fix u32 overflows when determining AGP base address in card space.Michel Dänzer
2007-01-10Revert "nouveau: Fill in context_init for nv10-nv3x."Dave Airlie
2007-01-09nouveau: Fill in context_init for nv10-nv3x.Jeremy Kolb jkolb@brandeis.edu
2007-01-10nouveau: Don't use DRIVER_USE_MTRR, we already setup our own mtrr over vram.Stephane Marchesin
2007-01-09ttm: make ttm alloc/free into alloc_pages/free_pagesDave Airlie
2007-01-09novueau: try resource 3 if resource 2 is 0 lengthDave Airlie
2007-01-08nouveau: fix nv4a context size.Stephane Marchesin
2007-01-08add export symbol for memory managerDave Airlie
2007-01-07Align whitespace with masterKeith Packard
2007-01-07Merge branch 'master' into crestlineKeith Packard
2007-01-08nouveau: nv4a context support.Stephane Marchesin
2007-01-08Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drmStephane Marchesin
2007-01-08i830: complete fix for i830 mapsDave Airlie
2007-01-08nouveau: oopsBen Skeggs
2007-01-08nouveau: nv43 context stuffBen Skeggs
2007-01-08drm: remove drm_follow_page, and drm_ioremap and ioremapfreeChristoph Hellwig
2007-01-08fixup i810/i830 to use drm_core_ioremap instead of drm_ioremapDave Airlie
2007-01-08nouveau: fix a stupid bug from me.Stephane Marchesin
2007-01-08nouveau: avoid allocating vram that's used as instance memory.Ben Skeggs
2007-01-08nouveau: map pci resource 2 on >=nv40Ben Skeggs
2007-01-06Revert i915 drm driver name to i915; miniglx doesn't work otherwiseKeith Packard
2007-01-06Bump i915 minor for ARB_OC ioctlWang Zhenyu
2007-01-06i915: ARB_Occlusion_query(MMIO ioctl) support.Zou Nan hai
2007-01-06nouveau: get c51 doing glxgears without the binary driver's help.Ben Skeggs
2007-01-06nouveau: Use PMC_BOOT_0 to determine which ctx_voodoo to load.Ben Skeggs
2007-01-05nouveau: oops, we don't need OS_HAS_MTRR actually.Stephane Marchesin
2007-01-05Merge branch 'master' of git+ssh://marcheu@git.freedesktop.org/git/mesa/drmStephane Marchesin
2007-01-05nouveau: Add an mtrr over the whole FBStephane Marchesin
2007-01-05Merge branch 'master' of git+ssh://matc@git.freedesktop.org/git/mesa/drm/Matthieu Castet
2007-01-05Add basic pgraph context for nv10.Matthieu Castet
2007-01-05Cleanup the nv04 fifo code a bit.Stephane Marchesin
2007-01-02i915: Fix a DRM_ERROR that should be DRM_DEBUG.Michel Dänzer
2007-01-02Make git ignore Emacs style backup files and cscope files.Michel Dänzer
2007-01-02linux-core: Make git ignore generated module symbol version files.Michel Dänzer
2007-01-02nouveau: oops, forgot to free RAMIN..Ben Skeggs
2007-01-02nouveau: Hookup nv40_graph_init.Ben Skeggs
2007-01-02nouveau: Hook up grctx code for NV4x.Ben Skeggs
2007-01-02nouveau: Add nv40-specific PGRAPH code, not hooked up yet.Ben Skeggs
2007-01-02nouveau: Only clobber PFIFO if no channels are already alloc'dBen Skeggs
2007-01-01make build against 2.6.20 hopefullyDave Airlie
2007-01-01fixup permission along line of kernelDave Airlie
2006-12-28Add some new via chipsets.Thomas Hellstrom
2006-12-27Leftover from previous commit.Thomas Hellstrom
2006-12-27Allow for non-power-of-two texture pitch alignment.Thomas Hellstrom
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-05 03:42:36 +0000
void *hw_status_page; unsigned long counter; dma_addr_t dma_status_page; drm_buf_t *mmap_buffer; u32 front_di1, back_di1, zi1; int back_offset; int depth_offset; int overlay_offset; int overlay_physical; int w, h; int pitch; int back_pitch; int depth_pitch; int do_boxes; int dma_used; int current_page; int page_flipping; wait_queue_head_t irq_queue; atomic_t irq_received; atomic_t irq_emitted; int front_offset; } drm_i810_private_t; /* i810_dma.c */ extern int i810_dma_schedule(drm_device_t *dev, int locked); extern int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_dma_init(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_dma_cleanup(drm_device_t *dev); extern int i810_flush_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern void i810_reclaim_buffers(struct file *filp); extern int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma); /* Obsolete: */ extern int i810_copybuf(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); /* Obsolete: */ extern int i810_docopy(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_rstatus(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_ov0_info(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_fstatus(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_ov0_flip(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_dma_mc(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern void i810_dma_quiescent(drm_device_t *dev); int i810_dma_vertex(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); int i810_swap_bufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); int i810_clear_bufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); int i810_flip_bufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); #define I810_BASE(reg) ((unsigned long) \ dev_priv->mmio_map->handle) #define I810_ADDR(reg) (I810_BASE(reg) + reg) #define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg) #define I810_READ(reg) I810_DEREF(reg) #define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0) #define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg) #define I810_READ16(reg) I810_DEREF16(reg) #define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0) #define I810_VERBOSE 0 #define RING_LOCALS unsigned int outring, ringmask; \ volatile char *virt; #define BEGIN_LP_RING(n) do { \ if (I810_VERBOSE) \ DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__); \ if (dev_priv->ring.space < n*4) \ i810_wait_ring(dev, n*4); \ dev_priv->ring.space -= n*4; \ outring = dev_priv->ring.tail; \ ringmask = dev_priv->ring.tail_mask; \ virt = dev_priv->ring.virtual_start; \ } while (0) #define ADVANCE_LP_RING() do { \ if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ dev_priv->ring.tail = outring; \ I810_WRITE(LP_RING + RING_TAIL, outring); \ } while(0) #define OUT_RING(n) do { \ if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ *(volatile unsigned int *)(virt + outring) = n; \ outring += 4; \ outring &= ringmask; \ } while (0) #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) #define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) #define CMD_REPORT_HEAD (7<<23) #define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) #define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) #define INST_PARSER_CLIENT 0x00000000 #define INST_OP_FLUSH 0x02000000 #define INST_FLUSH_MAP_CACHE 0x00000001 #define BB1_START_ADDR_MASK (~0x7) #define BB1_PROTECTED (1<<0) #define BB1_UNPROTECTED (0<<0) #define BB2_END_ADDR_MASK (~0x7) #define I810REG_HWSTAM 0x02098 #define I810REG_INT_IDENTITY_R 0x020a4 #define I810REG_INT_MASK_R 0x020a8 #define I810REG_INT_ENABLE_R 0x020a0 #define LP_RING 0x2030 #define HP_RING 0x2040 #define RING_TAIL 0x00 #define TAIL_ADDR 0x000FFFF8 #define RING_HEAD 0x04 #define HEAD_WRAP_COUNT 0xFFE00000 #define HEAD_WRAP_ONE 0x00200000 #define HEAD_ADDR 0x001FFFFC #define RING_START 0x08 #define START_ADDR 0x00FFFFF8 #define RING_LEN 0x0C #define RING_NR_PAGES 0x000FF000 #define RING_REPORT_MASK 0x00000006 #define RING_REPORT_64K 0x00000002 #define RING_REPORT_128K 0x00000004 #define RING_NO_REPORT 0x00000000 #define RING_VALID_MASK 0x00000001 #define RING_VALID 0x00000001 #define RING_INVALID 0x00000000 #define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) #define SC_UPDATE_SCISSOR (0x1<<1) #define SC_ENABLE_MASK (0x1<<0) #define SC_ENABLE (0x1<<0) #define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) #define SCI_YMIN_MASK (0xffff<<16) #define SCI_XMIN_MASK (0xffff<<0) #define SCI_YMAX_MASK (0xffff<<16) #define SCI_XMAX_MASK (0xffff<<0) #define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) #define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) #define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2) #define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) #define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) #define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24)) #define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23)) #define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23)) #define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23)) #define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23)) #define BR00_BITBLT_CLIENT 0x40000000 #define BR00_OP_COLOR_BLT 0x10000000 #define BR00_OP_SRC_COPY_BLT 0x10C00000 #define BR13_SOLID_PATTERN 0x80000000 #define WAIT_FOR_PLANE_A_SCANLINES (1<<1) #define WAIT_FOR_PLANE_A_FLIP (1<<2) #define WAIT_FOR_VBLANK (1<<3) #endif
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-05 03:42:36 +0000